Statistical Optimization of Leakage Power Considering Process Variations

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Statistical Optimization of Leakage Power
Considering Process Variations

• Ashish Srivastava, Dennis Sylvester and David
  Blaauw
• University of Michigan, Ann Arbor

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Need for Statistical Optimization

• Huge Impact of Process Variations Borkar DAC03

• Underlying process variations
• Over-estimated
• Harder to meet design specs
• Increased design effort
• Lost performance
• Under-estimated
• Yield loss

Intel Data
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Need for Statistical Optimization

• Traditional methods
• Use corner case models
• Circuit optimization results in timing wall
• Increased susceptibility to variations
• Limited information
• No yield analysis possible

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Statistical Power Optimization

• Consider optimization of leakage power using
  dual-Vth and sizing
• Low Vth gates known be to highly susceptible to
  variations Intel, IBM sources
• Adverse impact on yield and performance

• Minimize a high percentile point on the leakage
  current PDF
• Timing constraint imposed ona high percentile
  point of the delay PDF

Intel Data ICCAD 02
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Outline

• Preliminaries
• Assumptions
• Models
• Statistical Analysis
• Statistical Optimization
• Results

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Assumptions

• Only variations in gate length considered
• Easy extension to multiple sources of variation
• Impact of gate length on Vth implicitly
  considered
• Spatial correlation is neglected
• Improvements in SSTA tools in this area can
  beeasily incorporated within the
  proposedoptimization approach
• Correlation due to reconvergent fanouts is
  considered
• Negligible impact on leakage for large circuit
  blocks
• Variance saturates very quickly with
  increasingdesign size Rao/Srivastava TVLSI04
• Only consider within-die variations

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Delay/Leakage Models

• Delay is expressed as a quadratic function of
  gate length
• Gates characterized for delay using look-up
  tables
• Each table corresponds to a fitting parameter
• Input slope and load cap used to index into the
  table
• Mean and variance of delay can be easily obtained
• Extendable to variations in other process
  parameters
• Leakage expressed as a decaying exponential
• Leakage distribution for each gate is lognormal
• Extendable to other sources of variations if
  dependence is exponential (e.g., Vth0)

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Statistical Timing Analysis

• Statistical timing analysis A. Agarwal DAC03
• Gate delays are assumed to be Gaussian
• Delay PDFs are discretized and propagated through
  the circuit
• Easy to estimate any confidence point for delay
• Predicts lower and upper bounds for the exact
  delay PDF
• We use the conservative upper bound forour
  analysis
• Slack PDFs at all nodes are also generated

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Statistical Leakage Analysis

• Statistical leakage analysisRao/Srivastava
  ISLPED03
• Leakage for each gate is lognormal
• Dependence on gate length is exponential
• Gate length is assumed to be Gaussian
• Total leakage is approximated as a lognormal
• Leakages are combined using Wilkinsons method
• Match the first two moments
• Any confidence point can be estimated

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Outline

• Preliminaries
• Statistical Optimization
• Deterministic approach
• Statistical constraints
• Statistical sensitivities
• Results

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Deterministic approach

• Power and delay computation performed using
  corner case models
• Sensitivity based optimization approach
• Design initially mapped to a low Vth library
• Sized to meet timing using TILOS
• Iterative high Vth assignment
• Selecting a gate for high Vth assignment
• Based on max. sensitivity (?Power/?Delay)
• Sensitivities weighted by timing slack
• Upsize gates to maintain timing
• Based on max. sensitivity (?Delay/?Power)
• Sensitivities weighted by path criticality
• If total power is found to increase
• All moves are reversed
• Gate set to low Vth is flagged

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Enforcing statistical constraints

• Statistical analyzers instead of corner models
• Delay analysis
• Requires an STA and SSTA run
• STA finds index used to look-up fitting
  parameters
• Calculate mean and variance of delay for each
  gate
• Using the fitting parameters
• Perform SSTA
• Leakage analysis
• Estimate mean and variance of total leakage
• Statistical constraints reduce pessimism
  introduced through worst-case design

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Using statistical sensitivities

• Sensitivity computation / comparisonThe change
  in power or delay for a given Vth re-assignment
  or up-sizing is actually a distribution and not a
  single value
• Needs to be efficient
• Forms the inner loop of the optimization approach
• Hard to find the distribution of sensitivities
• ?Power/?Delay
• ?Power is a difference of two lognormals
• ?Delay is a gaussian Difference of two gaussians
  
• Weighting factor
• Function of slack at the node

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Sensitivity Computation

• Estimate mean and variance
• Weighting factors term is assumed to be
  independent of gate length
• ?Power/?Delay
• Expressed as a function of gate length usingthe
  fitting parameters
• Expand as a Taylor series and estimate meanand
  variance
• Weighting factor
• Estimate mean and variance using the slack PDFs
  generated at each node
• Combine to estimate mean and variance of
  theoverall sensitivity

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Sensitivity Comparison
Cumulative Probability
Sensitivity Value

• Distribution of sensitivities is not known
• Decision based on sensitivity comparison is
  requiredto be deterministic
• Sensitivity comparison is done at a specific
  pointof its distribution (Which point?)

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Outline

• Preliminaries
• Statistical Optimization
• Results

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Comparing various approaches

• Statistical optimization provides
  additionalreduction of 40 in leakage power at
  thetightest delay constraint
• Using corner models results in hugeperformance
  loss

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Achievable power reduction
OPT2 Using only statistical constraints OPT3
Using statistical constraints sensitivities

• Same percentile point used for delay target
• Reduces leakage in high frequency/high
  leakageparts by 29-36 on average vs.
  deterministicdual-Vth algorithms
• Significant contribution offered by both
  statistical constraints and statistical
  sensitivities

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Impact on leakage PDF

• Different approaches perform similarly for
  loosedelay constraint
• Using statistical techniques for high-performance
  circuits
• Significantly reduced leakage
• Results in a tighter distribution of leakage

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Comparing sensitivities

• Sensitivities are compared at
• Mean n Standard deviation
• Using n -1.65 and n -2.33 corresponds to the
  5 and 1 pointon a Gaussian
• Using a very low confidence point on a CDF gives
  a high confidencefor the minimum value of that
  sensitivity
• n-1.65 provides best results for 95
  delay/leakage targets
• n-1.65 and n-2.33 perform very similarly for
  99 targets

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Conclusions and future work

• First approach to statistical leakage power
  optimization
• Provides up to 50 reduction in leakage for high
  leakage parts under tight delay constraints
• Enforce statistical constraints
• Using corner case models is unacceptable
• Use statistical sensitivities
• Crucial to making moves that are most likely to
  provide best power-delay trade-off
• Future work Correlation of power and performance
• Samples with very low leakage will probably fail
  timing
• How to size/assign Vth to maximize parametric
  yield considering pressures from both sides (too
  slow too leaky)