The input network of the power amplifier will be designed in the example' The network synthesized wi

1
Introduction
The input network of the power amplifier will be
designed in the example. The network synthesized
will be expanded to allow for biasing of the
transistor gate. Some of the stubs in the network
will be replaced with stepped main-line sections.
A thin-film resistor will also be added to the
network to stabilize the transistor. The
performance will be restored by optimizing the
network. The discontinuity effects of the steps
will also be reduced by adding extra steps in the
network. The effects of these steps on the
performance will also be eliminated by
optimization.
2
The amplifier as designed previously. The length
of the input line selected has been increased to
allow the matching network to be synthesized to
start with a shunt element.
3
The specifications for the required matching
network will be set up by using one of the
wizards provided in a Schematic View.
4
The Impedance-Matching Wizard shown will be
selected.
5
The network required will be inserted to the
right of the selected component.
6
The position at which the network will be
inserted is high-lighted.
7
The Impedance-Matching Wizard has been launched.
8
The passband can be changed on this page.
9
A default name and title were assigned to the
matching problem.
10
The default option to control the gain/VSWRs
associated with the input network will be used.
11
The impedances to be matched are listed in the
table.
12
The option to display the impedances to be
matched graphically was selected.
13
The steps provided by the wizard were completed.
The Impedance-Matching Module will be launched
next.
14
The impedance-matching document has been opened.
The original circuit file is still open too.
15
The option to synthesize non-commensurate
microstrip networks has been selected.
16
The terminations page will be selected in order
to change the gain specified.
17
The terminations and the gain specified. Note
that the default gain values were set to level
the gain response of the amplifier.
18
The Gain Slope Command has been selected to
change all the gain values to 0 dB (best match
instead of lowest gain ripple).
19
The gain values were adjusted to 0 dB.
20
Some of the Topology Settings will be changed.
21
Five-element lowpass solutions, with the first
element (load side) shunt, will be synthesized.
22
The default settings for Gain Window and the
Q-range are displayed.
23
The lumped element values will not be constrained.
24
The Distributed Networks Wizard will be launched.
25
The first page of the wizard is displayed.
26
The same substrate will be used.
27
The specifications for the vias allowed. By
setting a large step size only one via size is
allowed.
28
Double stubs will be allowed in the networks to
be synthesized.
29
The line widths and the stub separation to be
used.
30
A rendering of the specifications made is
displayed. The blue box shown represents the
height of the substrate.
31
The parasitics associated with the junctions in
the networks to be synthesized. The range allowed
for the main-line should also be checked.
32
The last page of the wizard is displayed.
33
The changes made are saved.
34
The Synthesis Command will be selected.
35
The best solutions obtained with the
specifications made. Note that Q3 is outside the
search range specified (-4.4, 4.4).
36
The artwork of the first solution.
37
The command to display the next solution will be
selected.
38
The second solution obtained.
39
The third solution obtained.
40
The Q-range will be extended to see if better
solutions are available.
41
The Search Parameters Command will be selected.
42
The Quick Edit feature is used to increase the
search range.
43
The new Q-range.
44
The Synthesis Command will be selected again.
45
The best solution obtained this time. Q3 is
higher than before and the solution is more
sensitive to component changes.
46
The second solution obtained.
47
The third solution obtained.
48
The artwork of the second solution will be
displayed.
49
The artwork of the second solution.
50
The second solution will be exported to circuit
file.
51
The solution was exported. The option to close
the Impedance-Matching Document will be selected.
52
The matching network selected has been inserted
into the schematic. The Save Command will be used
to save the circuit.
53
The performance of the amplifier will be analyzed.
54
The transducer power gain response is very flat
over the passband and the input match is good
(VSWR lt 1.414).
55
The artwork of the amplifier is displayed. This
solution can be realized, but the two double
stubs on the input side will be replaced with
stepped main-line sections in order to illustrate
the features provided.
56
The Equivalent Stub Command will be used to
replace the stubs in the middle of the input
network with stepped main-line sections.
57
The option to replace the first stub with a
main-line section is selected.
58
The stub has been replaced with a main-line
section.
59
The performance with the change is analyzed.
60
The next stub will also be converted to a
main-line section.
61
The relevant option has been selected.
62
Both stubs have been replaced with stepped
main-line sections.
63
The artwork of the amplifier after replacing the
two stubs.
64
The input match was degraded by the changes made.
The performance will be restored by optimization.
65
The variables to be optimized will be marked next.
66
The variables set for optimization are displayed
in blue. Optimization bounds will be set next.
67
The bounds set for the first stepped main-line
section.
68
The bounds set for the next section.
69
The error function to be used during the
optimization will be set up next.
70
The parameters to be optimized were selected.
Note that the stability factor was not included
in the error function.
71
The passband can be changed on this page.
72
The gain to be optimized is the overall gain (all
the matching networks are in place at this point).
73
The gain window and the weight factors for the
gain are specified on this page.
74
The specifications made for the input and output
VSWRs.
75
The specifications made for the output power. The
output power could have been ignored at this
point (no variables were selected in the output
network).
76
The error function has been defined.
77
The command to optimize the circuit will be
selected next.
78
The performance after optimization is displayed.
The option to update the circuit with the changes
made will be accepted.
79
The schematic of the optimized input network.
80
The artwork of the optimized input network.
81
The input impedance and the output impedance of
the amplifier are displayed on a Smith Chart with
the normalized gain.
82
The stability of the circuit will be considered
next.
83
The Rollette (k) and the Sterne (K) stability
factors of the circuit are displayed.
84
The shunt resistance required to stabilize the
circuit will be displayed.
85
The circuit can be stabilized easily by loading
its input with a shunt resistor of 330 Ohm (The
loss in gain will be less than 1 dB).
86
The series resistance required on the input of
the circuit is not well-behaved.
87
The line shown will be split in two. The series
resistance required for stabilization at this
point is small and well-behaved. This was
established by experimentation.
88
The schematic before splitting the 67.7 Ohm line.
89
The line was split in two. The two lines combined
are identical to the original line.
90
The circuit to the left of the second 67.7 Ohm
line must be deleted temporarily to calculate the
resistance required for stabilization at this
point. The quickest way to do this is to edit the
text description of the circuit.
91
The circuit section of interest has been selected
and will be commented out.
92
The lines of interest were converted to comment
lines.
93
The schematic of the modified circuit will be
displayed.
94
The modified circuit was analyzed.
95
The series resistance required for stabilization
will be displayed.
96
The series resistance required on the input side
is small and decreases monotonically with
increasing frequency. 2.2 Ohm in series will be
sufficient to stabilize the transistor.
97
The commented lines will be activated again.
98
The relevant lines have been selected again and
will be activated again.
99
The schematic view will be opened again.
100
The restored schematic.
101
The Dimensions Command was used to display the
dimensions of the line selected. The line is 1mm
wide. The same width will be used for the
thin-film resistor.
102
A thin-film resistor will be inserted between the
two 67.7 Ohm lines.
103
The resistor was edited to be 1mm wide and 0.2mm
long.
104
The sheet resistance of the resistor will be
edited in a text view.
105
The sheet resistance was changed from 50
Ohm/square to 5 Ohm/square.
106
The performance of the modified circuit has been
analyzed. The resistor inserted (1 Ohm) is not
big enough to stabilize the circuit.
107
The length of the resistor was doubled and the
performance was analyzed again. The circuit is
now inherently stable. The loss in gain and the
change in the input VSWR are minimal.
108
The circuit will be edited to allow for biasing
the gate of the transistor.
109
A shunt block was inserted into the network after
adjusting the lengths of the two 50 Ohm lines.
110
The shunt network inserted.
111
The artwork of the modified network.
112
The length of the selected 50 Ohm line will be
increased to prevent coupling between the stubs.
113
The artwork after the adjustment.
114
Another shunt block was inserted to allow for
feeding the required dc voltage into the circuit.
115
The circuit after editing the second block.
116
Parasitics will be added to the 0603 capacitors
next.
117
The same parasitics are specified for the other
22pF capacitor.
118
The artwork of the circuit.
119
The selected stub will be bent downwards.
120
The specifications made for the bend.
121
The performance of the circuit with the changes
made.
122
The blocking capacitor required will be added
next.
123
The capacitor with its pads and the lines added
to model the phase shift through the capacitor.
124
Lines for modeling the phase shift were added to
the other capacitor too.
125
The length of the lines added will be adjusted in
the artwork view.
126
The specifications made for each of the lines
added.
127
The required cut commands will be added for the
phase shift lines in a text view.
128
The cut commands added for the capacitor selected.
129
The other capacitor is selected on the artwork in
order to add the required cut commands.
130
The commands after editing.
131
The performance of the circuit after the
adjustments.
132
The line selected will be shortened.
133
The values of the lumped components used can be
displayed on the artwork. This feature can be
toggled on/off by pressing the letter M.
134
The label associated with each lumped component
can be moved if necessary (Use the letters Q,
W, I and O).
135
The input network will be optimized again to
compensate for the changes made.
136
The stability factor can now be included in the
optimization.
137
The passband page.
138
The gain selected for optimization.
139
The window and the weight factors specified for
the gain.
140
The specifications made for the input and the
output VSWRs.
141
The specifications made for the stability factor.
142
The specifications made for the output power.
143
The last page of the Error Function Wizard.
144
The Optimization Command will be selected next.
145
The optimized performance. The option to update
the circuit with the changes made will be
selected.
146
The characteristic impedance values of the two
stepped lines were adjusted to be the same.
147
The performance of the optimized amplifier.
148
The artwork of the optimized amplifier.
149
The artwork after further refinement and
optimization.
150
The performance of the final amplifier.