Figure 9'1' Analysis of the SR latch'

1
(b)
Circuit with modeled gate delay
(b)
State-assigned table
Figure 9.1. Analysis of the SR latch.
2
(a)
State
table
(b)
State
diagram
Figure 9.2. FSM model for the SR latch.
3
Figure 9.3. Mealy representation of the SR
latch.
4
Please see portrait orientation PowerPoint file
for Chapter 9
Figure 9.4. The gated D latch.
5
Figure 9.5. Circuit for the master-slave D
flip-flop.
6
Please see portrait orientation PowerPoint file
for Chapter 9
Figure 9.6. Excitation and flow tables for
Example 9.2.
7
Figure 9.7. State diagram for the master-slave
D flip-flop.
8
z
y
Y
1
1
w
1
w
2
y
Y
2
2
Figure 9.8. Circuit for Example 9.3.
9
Next
state
Present
Output
state
w
w

00
01
10
11
2
1
y
y
z
2
1
Y
Y
Y
Y
Y
Y
Y
Y
2
1
2
1
2
1
2
1

00
0
0
01
10
11
0

01
11
0
1
11
11
0



10
00
1
0
1
0
1
0
1

11
1
1
10
10
10
0
(a)
Excitation
table
Next
state
Present
Output
state
z
w
w

00
01
10
11
2
1

A
A
B
C
D
0

B
D
B
D
D
0



C
A
C
C
C
1

D
D
C
C
C
0
(b)
Flow
table
Figure 9.9. Excitation and flow tables for the
circuit in Figure 9.8.
10
Next
state
Present
Output
state
z
w
w

00
01
10
11
2
1


A
A
B
C
0


B
D
B
D
0



C
A
C
C
C
1

D
D
C
C
C
0
Figure 9.10. Modified flow table for Example
9.3.
11
Figure 9.11. State table for Example 9.3.
12
Next
state
Present
Output
state
z
w
w

00
01
10
11
2
1


A
A
B
C
0



B
D
B
0



C
A
C
C
1


D
D
C
C
0
w
? dime
w
? nickel
2
1
Figure 9.12. Flow table for a simple vending
machine.
13
1
A/0
0
B/1
1
0
0
1
0
D/0
C/1
1
(a)
State
diagram
Next
state
Present
Output
State
z
w

0
w

1

A
A
B
0

B
C
B
1

C
C
D
1

D
A
D
0
(b)
Flow
table
Figure 9.13. Parity-generating asynchronous FSM.
14
Next
state
Present
Output
state
w

0
w

1
z
y
y
Y
Y
2
1
2
1

00
0
0
01
0

01
10
0
1
1

10
1
0
11
1

11
00
1
1
0
(a)
Poor
state
assignment
Next
state
Present
Output
state
w

0
w

1
z
y
y
Y
Y
2
1
2
1

00
0
0
01
0

01
11
0
1
1

11
1
1
10
1

10
00
1
0
0
(b)
Good
state
assignment
Figure 9.14. State assignment for Figure 9.13b.
15
Figure 9.15. Circuit that implements the FSM in
Figure 9.13b.
16
z
D
Q
w
Q
Figure 9.16. Synchronous solution for Example
9.4.
17
Figure 9.17. State diagram for a modulo-4
counter.
18
Please see portrait orientation PowerPoint file
for Chapter 9
Figure 9.18. Flow and excitation tables for a
modulo-4 counter.
19
Request1
Device 1
Grant1
Shared
Arbiter
resource
Request2
Device 2
Grant2
(a) Arbitration structure
Request (r)
Grant (g)
(b) Handshake signaling
Figure 9.19. Arbitration example.
20
r
r
2
1
01
01
A
0

0
B
01

00
11
00
10
10
00
01
C
10

10
11
Figure 9.20. State diagram for the arbiter.
21
Next
state
Present
Output
g
g
state
r
r

00
01
10
11
2
1
2
1

A
A
B
C
00
B
A
B
C
B
01
C
A
B
C
C
10
(a)
Flow
table
Next
state
Present
Output
state
r
r

00
01
10
11
2
1
y
y
g
g
2
1
Y
Y
2
1
2
1


A
00
0
0
01
10
00


B
01
00
0
1
10
0
1
01


C
10
00
01
1
0
1
0
10


D
11
01
10
dd
(b)
Excitation
table
Figure 9.21. Implementation of the arbiter.
22
r
1
g
1
r
2
y
2
g
2
Figure 9.22. The arbiter circuit.
23
Next
state
Present
Output
g
g
state
2
1
r
r

00
01
10
11
2
1

A
A
B
C
00
B
A
B
A
B
01
C
A
A
C
C
10
(a)
Modified
flow
table
Next
state
Present
Output
r
r

00
state
01
10
11
2
1
g
g
y
y
2
1
Y
Y
2
1
2
1


00
0
0
01
10
00


01
00
0
1
00
0
1
01


10
00
00
1
0
1
0
10
(b)
Modified
excitation table
Figure 9.23. An alternative for avoiding a
critical race in Figure 9.21a.
24
10
0


00
00

00
00

B
C
1x
10

x1
01


01
0
Figure 9.24. Mealy model for the arbiter FSM.
25
Next
state
Output
g
g
Present
2
1
state
r
r

00
01
10
11
00
01
10
11
2
1
B
B
B
C
B
00
01
0
01
C
C
B
C
C
00
0
10
10
(a)
Flow
diagram
Next
state
Output
Present
state
r
r

00
01
10
11
00
01
10
11
2
1
y
g
g
Y
2
1
d
0
0
0
1
0
00
01
0
01
1
1
0
1
1
00
0
d
10
10
(b)
Excitation
table
Figure 9.25. Mealy model implementation of the
arbiter FSM.
26
Please see portrait orientation PowerPoint file
for Chapter 9
Figure 9.26. Derivation of an FSM for the
simple vending machine.
27
Next
state
Present
Output
state
z
DN

00
01
10
11


A
A
B
C
0



B
D
B
0



C
A
C
1


D
D
E
C
0



E
A
E
1
Figure 9.27. First-step reduction of the FSM in
Figure 9.26b.
28
Next state
Present
Output
state
z
w
w

00
01
10
11
2
1

A
A
H
B
0

B
F
B
C
0


C
H
C
1

D
A
D
E
1

E
D
G
E
1


F
F
D
0


G
F
G
0


H
H
E
0
Figure 9.28. A primitive flow table.
29
B
C
A
D
E
G
F
H
Figure 9.29. Merger diagram for the flow table
in Figure 9.28, which preserves the
Moore model.
30
Next state
Present
Output
state
z
w
w

00
01
10
11
2
1
A
A
A
B
D
0
B
B
D
B
C
0


C
A
C
1
D
A
D
B
D
1
Figure 9.30. Reduced Moore-type flow table for
the FSM in Figure 9.28.
31
C
B
A
D
H
E
G
F
Figure 9.31. Complete merger diagram for Figure
9.28.
32
Next
state
Present
Output
z
state
w
w

00
01
10
11
2
1


A
A
F
C
0


B
A
B
H
1


C
G
C
D
0



D
F
D
1


E
G
E
D
1



F
F
K
0


G
G
B
J
0


H
L
E
H
1



J
G
J
0


K
B
E
K
1


L
A
L
K
1
Figure 9.32. Flow table for Example 9.8.
33
Next
state
Present
Output
state
z
w
w

00
01
10
11
2
1


A
A
F
C
0


B
A
B
H
1


C
G
C
D
0



D
F
D
1


E
G
E
D
1



F
F
H
0


G
G
B
J
0


H
B
E
H
1



J
G
J
0
Figure 9.33. Reduction obtained by using the
partitioning procedure.
34
A
C
D
B
G
F
J
E
H
Figure 9.34. Merger diagram for Figure 9.33.
35
Next
state
Present
Output
state
z
w
w

00
01
10
11
2
1


A
A
A
C
B
0


B
A
B
D
B
1


C
G
C
D
0


D
G
A
D
D
1



G
G
B
G
0
Figure 9.35. Reduction obtained from the merger
diagram in Figure 9.34.
36
C
B
D
G
A
Figure 9.36. Merger diagram for Figure 9.35.
37
Next
state
Present
Output
state
z
w
w

00
01
10
11
2
1


A
A
A
C
B
0


B
A
B
D
B
1


C
C
B
C
D
0


D
C
A
D
D
1
Figure 9.37. Reduced flow table for Example 9.8.
38
Next
state
Present
Output
state
z
w
w

00
01
10
11
2
1


A
A
G
E
0


B
K
B
D
0


C
F
C
H
1


D
C
E
D
0


E
A
E
D
1


F
F
C
J
0


G
K
G
D
1



H
E
H
1


J
F
J
D
0


K
K
C
B
0
Figure 9.38. Flow table for Example 9.9.
39
Next
state
Present
Output
z
state
w
w

00
01
10
11
2
1


A
A
G
E
0


B
F
B
D
0


C
F
C
H
1


D
C
E
D
0


E
A
E
D
1


F
F
C
B
0


G
F
G
D
1



H
E
H
1
Figure 9.39. Reduction resulting from the
partitioning procedure.
40
D
B
C
A
E
F
H
G
(a) Preserving the Moore model
G
H
C
A
B
D
F
E
(b) Complete merger diagram
Figure 9.40. Merger diagrams for Figure 9.39.
41
Next state
Output
z
Present
state
w
w

00
01
10
11
00
01
10
11
2
1




A
A
G
E
0


B
F
B
D
0
0
0



C
F
C
H
1
1




D
C
E
D
0




E
A
E
D
1



F
F
C
B
0
0




G
F
G
D
1




H
E
H
1
1
Figure 9.41. The FSM of Figure 9.39 specified
in the form of the Mealy model.
42
Next
state
Output
z
Present
state
w
w

00
01
10
11
00
01
10
11
2
1



A
A
B
D
A
0
1
1


B
C
B
B
D
0
1
0
0


C
C
C
B
A
0
1
0
1




D
A
C
D
D
1
0
Figure 9.42. Reduced flow table for Example 9.9.
43
Next
state
Present
Output
state
z
w
w

00
01
10
11
2
1


A
A
B
C
0


B
F
B
H
0


C
F
C
H
0


D
D
G
C
1


E
A
E
H
0


F
F
E
C
0


G
D
G
H
0


H
G
C
H
1
Figure 9.43. Flow table for Example 9.10.
44
Next
state
Present
Output
state
z
w
w

00
01
10
11
2
1


A
A
B
C
0


B
A
B
H
0


C
A
C
H
0


D
D
G
C
1


G
D
G
H
0


H
G
C
H
1
Figure 9.44. Reduction after the partitioning
procedure.
45
H
C
B
D
G
A
Figure 9.45. Merger diagram for Figure 9.44.
46
Figure 9.46. Reduced flow table for Example
9.10.
47
w
1

C
10

D
11

w
0

w
0

A
00

B
01

w
1

(a) Corresponding to Figure 9.14
a
w
1

D
10

C
11

w
0

w
0

A
00

B
01

w
1

(b) Corresponding to Figure 9.14
b
Figure 9.47. Transitions in Figure 9.13.
48
C
10

01
00
10
10
00
A
00

B
01

01
(a) Transitions in Figure 9.21a
10
C
10

D
11

01
10
00
01
10
00
A
00

B
01

01
(b) Using the extra state
D
Figure 9.48. Transitions for the arbiter FSM in
Figure 9.21.
49
Next
state
Present
Output
state
g
g
r
r

00
01
10
11
2
1
2
1


A
A
B
C
00


B
A
B
D
B
01


C
A
D
C
C
10


D
B
C
10
Figure 9.49. Modified flow table based on the
transitions in Figure 9.48b.
50
Next
state
Present
Output
state
g
g
r
r

00
01
10
11
2
1
2
1


A
1
2
4
00


B
1
2
4
3
01


C
1
2
4
5
10
Figure 9.50. Relabeled flow table of Figure
9.21a.
51
C
10

C
10

1 4
,
2 4
,
,
,
,
,
1 4
2
2 4
1
1 2
,
,
,
1 2
4
A
00

B
01

A
00

B
01

(b) Complete transition diagram
(a) Transitions in Figure 9.50
C
10

,
,
1 4
2
1 2
4
,
,
00

B
01

A
(c) Selected transition diagram
Figure 9.51. Transition diagrams for Figure
9.50.
52
Next
state
Present
Output
z
z
state
w
w

00
01
10
11
2
1
2
1


A
A
B
C
A
00


B
B
B
D
C
01


C
A
C
D
C
10


D
B
D
A
11
(a)
Flow
table
Next
state
Present
Output
state
z
z
w
w

00
01
10
11
2
1
2
1


A
1
4
7
2
00


B
3
4
7
6
01


C
1
5
7
6
10


D
3
7
2
11
(b)
Relabeled flow
table
Figure 9.52. Flow tables for Example 9.13.
53
C
11

7
D
10

,
D
10

B
11

3
7
3
7
,
7
2
7
,
6
7
,
2
7
,
6
7
,
1
7
,
4
7
,
B
,
4
7
1
7
,
A
00

B
01

A
00

C
01

(a) First transition diagram
(b) Second transition diagram
3
7
4
,
,
D
10

B
11

2
7
4
,
,
6
7
,
1
7
,
A
00

C
01

(c) Augmented transition diagram
Figure 9.53. Transition diagrams for Figure
9.52.
54
Next state
Output
z
z
Present
2
1
state
w
w

00
01
10
11
00
01
10
11
2
1


A
A
D
D
A
00
00
11
00


B
B
B
D
C
01
01
11
01


C
A
C
B
C
0
10
1
10

D
B
B
D
A
1
0
11
00
(a)
Modified
flow
table
Next
state
Output
Present
state
w
w

00
01
10
11
00
01
10
11
2
1
y
y
2
1
Y
Y
z
z
2
1
2
1


A
00
0
0
10
10
0
0
00
00
11
00


B
11
1
1
1
1
10
01
01
01
11
01


C
01
00
0
1
11
0
1
10
10
0
1

D
10
11
11
1
0
00
11
00
1
0
(b)
Excitation
table
Figure 9.54. Realization of the FSM in Figure
9.52a.
55
Next
state
Present
Output
z
z
state
w
w

00
01
10
11
2
1
2
1


A
A
A
C
B
00


B
A
B
D
B
01


C
C
B
C
D
10


D
C
A
D
D
11
(a)
Flow
table
Next
state
Present
Output
z
z
state
w
w

00
01
10
11
2
1
2
1


A
1
2
6
4
00


B
1
3
7
4
01


C
5
3
6
8
10


D
5
2
7
8
11
(b)
Relabeled flow
table
Figure 9.55. FSM for Example 9.14.
56
,
,
B
1
4
A
B
1
4
A
7
6
7
6
3
2
3
2
F
3
E
7
,
5
8
,
5
8
,
5
8
D
C
G
D
C
(b) Augmented transition diagram
(a) Transition diagram
G
5
8
,
7
D
E
5
8
,
y
7
2
2
3
F
C
y
3
6
3
y
1
A
B
1
4
,
(c) Embedded transition diagram
Figure 9.56. Transition diagrams for Figure
9.55.
57
Please see portrait orientation PowerPoint file
for Chapter 9
Figure 9.57. Modified tables for Example 9.14.
58
Figure 9.58. Embedded transition diagram if two
nodes per row are used.
59
Please see portrait orientation PowerPoint file
for Chapter 9
Figure 9.59. Modified flow and excitation
tables for Example 9.15.
60
Next
state
State
Present
Output
z
z
assignment
State
w
w

00
01
10
11
2
1
2
1


0001
A
A
A
E
F
00


0010
B
F
B
G
B
01


0100
C
C
H
C
I
10


1000
D
I
J
D
D
11



0101
E
C
0


0011
F
A
B
0



1010
G
D
1



0110
H
B
01


1100
I
C
D
1



1001
J
A
00
Figure 9.60. State assignment with one-hot
encoding.
61
1
0
0
0


1
1
(a) Static hazard
1
0


0
1
1
0
(b) Dynamic hazard
Figure 9.61. Definition of hazards.
62
Please see portrait orientation PowerPoint file
for Chapter 9
Figure 9.62. An example of a static hazard.
63
Please see portrait orientation PowerPoint file
for Chapter 9
Figure 9.63. Two-level implementation of
master-slave D flip-flop.
64
x
x
1
2
x
x
3
4
00
01
11
10
00
d
d
01
d
11
1
1
1
1
10
1
1
1
1
Figure 9.64. Function for Example 9.17.
65
Please see portrait orientation PowerPoint file
for Chapter 9
Figure 9.65. Static hazard in a POS circuit.
66
Please see portrait orientation PowerPoint file
for Chapter 9
Figure 9.66. Circuit with a dynamic hazard.
67
Figure 9.67. Initial state diagram for the
vending-machine controller.
68
Next
state
Present
Output
state
z
DN

00
01
10
11

A
A
B
C
0



B
D
B
0



C
J
C
0


D
D
E
F
0



E
G
E
0




F
A
F
1


G
G
H
I
0



H
A
H
1



I
A
I
1


J
J
K
L
0



K
A
K
1



L
A
L
1
Figure 9.68. Initial flow table for the
vending-machine controller.
69
Next
state
Present
Output
state
z
DN

00
01
10
11


A
A
B
C
0



B
D
B
0



C
G
C
0


D
D
E
F
0



E
G
E
0



F
A
F
1


G
G
H
F
0



H
A
H
1
Figure 9.69. First step in state minimization.
70
B
A
C
H
D
F
G
E
Figure 9.70. Merger diagram for Figure 9.69.
71
Next
state
Present
Output
state
z
DN

00
01
10
11


A
A
B
C
0



B
D
B
0



C
G
C
C
0


D
D
C
F
0



F
A
F
F
1

G
G
F
F
0

(a)
Minimized flow
table
Next
state
Present
Output
state
z
DN

00
01
10
11


A
1
2
4
0



B
5
2
0



C
8
3
4
0


D
5
3
7
0


F
1
6
7
1


G
8
6
7
0

(b)
Relabeled flow
table
Figure 9.71. Reduced flow tables.
72
Figure 9.72. State diagram for the
vending-machine controller.
73
Figure 9.73. Determination of the state
assignment.
74
Next
state
Present
Output
state
DN

00
01
10
11
y
y
y
z
3
2
1
Y
Y
Y
3
2
1


A
000
0
00
010
100
0




B
010
011
0
10
0




C
111
101
1
11
1
11
0




D
011
0
11
111
001
0




F
001
000
0
01
0
01
1




G
101
1
01
001
001
0




100
110
0



110
111
0
Figure 9.74. Excitation table based on the
state assignment in Figure 9.73b.
75
Please see portrait orientation PowerPoint file
for Chapter 9
Figure 9.75. Karnaugh maps for the functions in
Figure 9.74.
76
Figure 9.76. Circuit for Example 9.19.
77
Please see portrait orientation PowerPoint file
for Chapter 9
Figure 9.77. Excitation and flow tables for the
circuit in Figure 9.76.
78
Figure 9.78. Karnaugh maps for the circuit in
Figure 9.76.
79
Figure 9.79. Waveforms for Example 9.21.
80
Figure 9.80. State diagram and flow table for
Example 9.21.
81
Figure 9.81. Flow table for Example 9.22.
82
Figure 9.82. Reduction after the partitioning
procedure.
83
Figure 9.83. Merger diagram for the flow table
in Figure 9.82.
84
Figure 9.84. Reduced flow table for the FSM in
Figure 9.82.
85
Figure 9.85. Relabeled flow table of Figure
9.84.
86
Figure 9.86. Transition diagrams for Figure
9.85.
87
Figure 9.87. Excitation and flow tables for
Example 9.22.
88
Figure 9.88. Karnaugh map for Example 9.23.
89
w
1
z
1
y
1
y
2
z
2
w
2
Figure P9.1. Circuit for problem 9.1.
90
C
z
1
z
2
Figure P9.2. Circuit for problem 9.2.
91
Please see portrait orientation PowerPoint file
for Chapter 9
Figure P9.3. Flow table for problem 9.3.
92
Next
state
Present
Output
z
state
w
w

00
01
10
11
2
1


A
A
B
C
0


B
K
B
H
0

C
F
C
M
0



D
D
E
J
1


E
A
E
M
0


F
F
L
J
0


G
D
G
H
0


H
G
J
H
1

J
F
J
H
0


K
K
L
C
1



L
A
L
H
0


M
G
C
M
1
Figure P9.4. Flow table for problem 9.4.
93
Next
state
Present
Output
state
z
w
w

00
01
10
11
2
1


A
A
B
C
0


B
D
B
G
0

C
F
C
G
0



D
D
E
C
1


E
A
E
G
0


F
F
E
C
0


G
B
C
G
1
Figure P9.5. Flow table for problem 9.9.
94
Figure P9.6. Circuit for problem 9.14.
95
c
w
z
Figure P9.7. Waveforms for problem 9.17.