Compiler Optimization Research : Perspectives and Opportunities

1
Compiler Optimization Research Perspectives and
Opportunities

• Santosh Pande
• Compiler Research Laboratory
• College of Computing
• Georgia Institute of Technology
• E-mail santosh_at_cc.gatech.edu

2
Embedded and Mobile Systems Why Compiler
Optimizations?

• Motivation Compilers can do intricate analysis
  of program properties and fine tune requirements
  of programs when resources are limited or when
  they are shared over the network
• Performance measures to be optimized code size,
  speed, predictability, power consumption,
  mobility etc.
• Requirements due to limited local
  memories/instruction sets of embedded processors,
  limited bandwidths of communication, real time
  requirements, need for mobility etc.
• Need for new research? Yes, existing compiler
  techniques inadequate -- PLDI 99 (Rao, Pande) ,
  RTSS 99 (Sunderam, Pande) papers.

3
Overview of Research Projects

• Optimizing Java Mobile Programs Over Fixed and
  Wireless Networks
• Program Slicing and Just-in-Time Optimizations
  for Mobile Codes on Smart Cards for Security and
  Efficiency
• Optimizing Energy Consumption in High Performance
  Superscalars through Compiler Control
• Efficient Code Generation and Memory
  Optimizations for High Performance Digital Signal
  Processors (DSPs)
• Dynamic Optimizations using combination of
  static/dynamic analyses

4
Optimization for Smart Cards for Security and
Efficiency

• Smart Cards have very tight resources and also
  have high demands of security.
• Large applications cannot fit mobile slices of
  codes are downloaded, compiled just-in-time and
  executed.
• Slicing should be done so that program behaviour
  can not be guessed by observing which slice is
  down-loaded when.
• Slices must fit memory -- frequent downloading
  of slices should be avoided bad for both
  security and efficiency
• We derive safe regions of program which need not
  be atomic slicing could be safely done across!
• Dynamic dead code elimination and re-slicing
  helps
• Just-in-time register optimizations reduce spill
  code!

5
Compiler Framework for Saving Static Energy in
Functional Units

• Santosh Pande
• Georgia Institute of Technology
• Co-workers Siddharth Rele, Rajiv Gupta and
  Soner Onder

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Functional Unit Management

• Modern high performance processors consume a lot
  of power (e.g. DEC Alpha family consumes 70 watt
  for server grade processors)
• Processors optimized for speed -- power consumed
  in functional units, caches, data paths etc.
• Power consumed due to activity (dynamic) as well
  as non-activity (static)
• High amount of instruction level parallelism
  (applications such as MediaBench fully parallel)
  -- increase in number of functional units in
  processors.
• Increased performance and complex hardware (for
  out of order, speculation etc.) leads to more
  power consumption.
• Functional units idle during large intervals
• Need to analyze the resource requirements of a
  program and shut down the processors parts to
  save power no degradation in performance should
  be allowed ( program performance degradation
  will hurt since other processor components will
  kept ON longer!)

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Components of Power
Ptotal CL V2 fclk Isc
V IleakageV
Dynamic Short Ckt Static

• Dynamic Power Switching
• Power consumed due to active switching in
  circuits.
• Currently very high as compared to other
  components.
• Short Circuit Power
• Transient power.
• Can be reduced by good design.
• Static Power Leakage
• Depends on the number of transistors present in
  the circuit.

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Power Distribution

• Static Power is currently around 10 of the total
  power.
• Use of Voltage Scaling to reduce dynamic power,
  leads to increase in Static power and can go as
  high as 50 of the total power (Sohi MICRO
  2000).
• Static Power increases due to
• Lower Operating Voltage.
• More number of transistors in the circuit.

STATIC POWER IS AN INCREASING COMPONENT OF THE
TOTAL POWER
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How much can we save ?

• Utilization in terms of busy cycles found to be
  very low for certain functional units

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Step 1 CFG
void main() for (i 0 i lt 100 i )
if (sum lt 1000) sum sum arri
else sum sum/1000 count
print(count,sum)
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Step 2 Profiled Resource Analysis
1
lt int adders, int mulsgt
Start
i 0
lt 1,0 gt
1
F
100
if sum lt 1000
lt 1,0 gt
T
4
sum sum /1000 count
lt 2,0 gt
sum sum arri
96
lt 1,1 gt
100
i
lt 1,0 gt
100
lt 1,0 gt
if (ilt 100)
T
F
1
lt ALL gt
print(count,sum)
End
1
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Step 3 Identify HOT Blocks
1
Start
1 , lt 1,0 gt
i 0
F
100, lt 1 , 0 gt
if sum lt 1000
if sum lt 1000
4 , lt 1,1 gt
T
96, lt 2,0 gt
sum sum /1000 count
sum sum arri
sum sum arri
100 lt 1,0 gt
i
i
100 lt 1,0 gt
if (ilt 100)
if (ilt 100)
T
F
print(count,sum)
1, lt ALL gt
End
1
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Step 4 Power Blocks
Start
Loop PowerBlock lt 2 , 0 gt
If PowerBlock lt 2 , 0 gt
i 0
if sum lt 1000
F
lt 1,1 gt
T
sum sum /1000 count
sum sum arri
i
if (ilt 100)
T
F
print(count,sum)
End
14
Generate Power Code
Start
Loop PowerBlock lt 2 , 0 gt
If PowerBlock lt 2 , 0 gt
i 0
if sum lt 1000
F
lt 1,1 gt
T
sum sum /1000 count
sum sum arri
i
if (ilt 100)
T
F
print(count,sum)
End
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Architecture Description

• Architecture description
• 2 integer adder units.
• 2 integer multiplier units.
• 1 floating point adder unit.
• 1 floating point multiplier unit.
• Super-Scalar, with out-of-order execution.
• Speculative Processor with Control Speculation.
• New add.on, mul.on, add.off, mul.off instructions
  added
• Switching Latency variable from 10 cycles to
  100 cycles to model different architectures

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Results
Static Power Savings integer units in terms
of switching OFF of units
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Results
Static Power Savings floating units in terms
of switching OFF units
18
Results
Degradation of Performance
19
Results
Number of Transitions
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Conclusion

• Static Power Savings in some functional units up
  to 90.
• Hardware techniques such as Voltage Gating can be
  used to switch OFF the units.
• A compiler framework for power saving, which can
  be further extended for switching OFF power in
  other components.
• Current work focused on optimizing issue logic
  
• Estimate instruction level parallelism at basic
  block boundaries
• Adjust the window size of the issue logic high
  ILP gt small window and small ILP gt large window

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Opportunities to do Research

• CS 6241 Compiler Optimizations Course should be
  your first step
• CS 8803 Emerging Research Directions in
  Compiler Research offered Next Semester
• Try out projects offered in CS 7001
• Try 8903 special projects several ideas, stop
  by and talk to me
• RA positions available for Ph.D. students
• Research is funded by NSF, DARPA, Greenhills
  Software, Infineon etc.
• Compilers offer a unique blend of theory and
  practice and are beautiful to learn science of
  abstraction and translation!