Solder Choice in the FlipChip Bonding of Optoelectronic Integrated Circuits Undergraduate Research S

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Solder Choice in the Flip-Chip Bonding of
Optoelectronic Integrated Circuits(Undergraduate
Research Symposium Presentation)

• Hanching Fuh
• Microelectronics Laboratory
• University of Illinois at Urbana-Champaign
• Urbana, IL
• Professor K.C. Hsieh, Faculty Advisor
• April 21, 2001

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Motivation for ResearchWhat do you want from
technology?

• Smaller

• Cheaper

• Faster

• Lower Power

? Higher Integration
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Motivation for Research (Part 2)

• Communications networks of the future require
  higher integration too!

• Networks need

• Analog and Digital circuits

• Lasers

• Detectors and other optical devices

• Fiber optic lines

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A Vision for the Future

• A Communications System on a Chip

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What enables integration?

• Flip-Chip Bonding

What is Flip-Chip Bonding?

• Flip-Chip Bonding attaches one device to a
  separate chip with solder

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What does that mean exactly?
?
?

• Enables the Electrical and Mechanical Connections
  of Dissimilar Devices

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How do you do Flip-Chip Bonding?
?
?
?
?
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What do we want in a solder for flip-chip bonding?

• A rose is a rose is a rose is a rose
• - Gertrude Stein
• All men are created equal
• - Declaration of Independence
• A solder is not a solder is not a solder is not a
  solder!
• Not all solders are created equal!

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Differences in solder

• What we want
• ? Low ( lt 450 C)
• ? High
• ? High yield
• ? Cheap
• Avoid Toxic metals
• (Pb, Cd, etc.)
• ? De-wetting/Surface Tension abilities

• Melting temperature
• Conductivity
• Process yield
• Cost
• Environmental Friendliness
• Self-alignment

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Overview of Research

• Devices/chips fabricated and solder is put on
  bonding pads

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Overview of Research (pt. 2)

• Chip and device brought into optical alignment
• Samples heated until solder bumps melt and bond
  together

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Overview of Research (pt.3)

• Measure resistance through a path

• Extrapolate resistance of wires to find bond
  resistance

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Solder Choices

• Three Tin (Sn) based binary solders
• Tin/Indium (Sn/In)
• 48/52
• 117 C
• Tin/Zinc (Sn/Zn)
• 72/28
• 325 C
• Tin/Gold (Sn/Au)
• 60/40
• 310 C

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Processing of Flip-Chip Structure (1)

• Create wires and bonding pads

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Processing of Flip-Chip Structure (2)

• Put solder onto bonding pads

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Final Flip-Chip Structure
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Results

• Nothing
• At least in the beginning!
• Significant Progress made on project

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Results (pt. 2)

• Sn-In
• Low melting temperature (117 C)
• Bonding done at 200 C

• Processing yield high w/ and w/o adhesion layer
• Bonding yield high

• Processing yield high w/ and w/o adhesion layer
• Bonding yield high

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Results (pt. 3)

• Sn-In

• Bond Resistance
• (Measured resistance Wire resistance) /
  bonds
• (Measured R (Pl)/(wt)) / bonds
• P resistivity, l length, w width, t
  thickness
• Average bond resistance 0.877 ?
• This is low!

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Results (pt. 4)

• Sn-Zn

• Sn-Au

• High melting temperature
• 325 C
• Bonding done at 400 C

• High melting temperature
• 310 C
• Bonding done at 400 C

• Problems with Solder Sticking to Bonding Pad
• Sn-Zn solved with adhesion layer of titanium
• Sn-Au
• Indirect sample heating
• evaporation rate
• evaporation depth
• Successful in Sn-Au solder sticking to bonding pad

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Picture of Tin-Gold Pad
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Results (pt. 5)

• Most problems with Sn-Zn and Sn-Au solved
• Problems with bonding, not processing
• Alignment
• Heating temperature
• Heating time
• Further trials in progress
• Resistance will be even better than Sn-In for
  Sn-Au
• Resistance close for Sn-Zn

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How do we predict this?

• Approximation
• Resistivity is weighted average of individual
  resistivity

Example 48 Tin and 52 Indium ? .48
1.149E-7 .52 8E-8 9.68E-8 ?-m
Sn-Zn 2.7 higher resistivity Sn-Au 18.6
lower resistivity
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Recommendations
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What to remember about Flip-Chip Bonding

• Low resistance
• Allows High Integration
• Enables what we want in technology
• Low cost
• Helps alleviate problems like EMI, crosstalk
• Increasingly important

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QA
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Thank you!

• To the audience for listening to me
• John Hughes and everyone who keeps the
  Microelectronics Lab running
• All the members of the MBE group
• Particularly.
• Bruce Flachsbart
• John Epple
• Professor K.C. Hsieh