Development of Template Architecture For ASIP Synthesis

1
Development of Template Architecture For ASIP
Synthesis

• BackgroundTodays embedded systems require
  custom designed processors (called Application
  Specific Instruction set Processors or ASIPs)
  tailored to particular application domains. ASIPs
  employ different application specific features
  such as custom instructions and data path widths
  to meet tight constraints on runtime, power
  dissipation and area. Designing a custom
  processor for a particular application is not
  easy. It usually involves an architecture
  exploration phase gradual iterative refinement
  of the processor architecture starting from a
  basic architectural template. The better the
  initial template, the faster the iterative
  exploration process converges. Finding a suitable
  first guess of the instruction set
  architecture, therefore, is of prime importance.

Contact Person Kingshuk Karuri (WSH 24 A 306)
Tel. [phone]
2
Development of Template Architecture For ASIP
Synthesis

• Project Description
• The major goal of this project is to automate
  the process of application specific custom
  processor development. For this, extensive
  application analysis is required. A design flow
  with such application analysis, combining an
  advanced application profiler and a custom
  instruction identifier is shown here. The
  architectural hints obtained through application
  analysis have to be combined with some existing
  architectural template (s) to obtain the final
  architecture. The focus of this project is to
  design architectural templates in LISA for
  different application domains. For that,
  different architectural alternatives for
  different application domains (such as DSP,
  network processing etc.) have to be studied and
  implemented in different LISA processor models.

Contact Person Kingshuk Karuri (WSH 24 A 306)
Tel. [phone]