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A Fast Algorithm for Context Aware Buffer Insertion

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Restrictions on buffer locations (Macros, IPs..) We may have to detour to 'pick up' a buffer ... Paths characterized by (g,d) pair. P(v) : set of all non ... – PowerPoint PPT presentation

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Title: A Fast Algorithm for Context Aware Buffer Insertion


1
A Fast Algorithm for ContextAware Buffer
Insertion
  • Ashok Jagannathan,
  • Sung-Woo Hur,
  • John Lillis
  • University of Illinois, Chicago.
  • June, 2000

2
Outline
  • Motivation
  • Problem Formulation
  • Algorithm
  • Results
  • Properties
  • Conclusion

3
Motivation
  • Buffer insertion
  • Restrictions on buffer locations (Macros, IPs..)
  • We may have to detour to pick up a buffer

4
Motivation
  • Given
  • Candidate buffer locations
  • Buffer library
  • Source/sink terminals (2 pins)
  • Objectives
  • Min cost path s.t. delay lt Dspec
  • Weakly NP-hard
  • Shortest weight-constrained path problem GJ
  • Min-delay path
  • Polynomial-time solvable

5
Motivation
  • Pseudo-polynomial algorithm
  • Paths characterized by (g,d) pair
  • P(v) set of all non-dominated s-v paths
  • Propagate solutions from source to sink
  • Problems
  • P(v) Not polynomially-bounded in E,V
  • Comparatively slow in practice

6
Motivation
  • Finding min delay path
  • Fast-path algorithm Zhou et. al., DAC99
  • Reasonably fast
  • Problem
  • May not be good use of resources

delay
min delay
cost
7
Motivation
  • Pseudo-polynomial algorithm
  • Aware of cost/delay tradeoff
  • Relatively slow
  • Fast-path algorithm
  • Unaware of tradeoff
  • Polynomial time
  • Need something in between
  • Composite objective (cost vs. delay)
  • Systematically explore tradeoff curve
  • Should be fast

8
Problem Formulation
  • We propose
  • Max Delay Reduction to Cost Ratio (DRCR)
  • Given
  • Candidate locations buffer library
  • Source, sink
  • Reference delay, Dref
  • Objective
  • A buffered source/sink path p s.t.
  • (Dref - Dp)
  • Gp
  • is maximized.
  • Dp delay of p
  • Gp cost of p

9
Buffer Graph
  • Directed
  • Nodes Buffers source,sink
  • Edges Candidate connections
  • Edges
  • Not detailed routes
  • buffer-buffer connections
  • ge estimated cost of the edge
  • routing cost
  • cost of destination buffer
  • anything you want
  • de estimated interconnect delay (input to input)

10
Buffer Graph - Illustration
11
Buffer Graph - Illustration
With cascading
12
Buffer Graph - Illustration
13
Buffer Graph
  • Properties
  • Independent of cost model
  • Almost independent of delay estimation model
  • Path topological route buffering
  • Nodes determine type of buffer
  • Allows cascaded-buffers
  • Observation
  • Need not be a complete graph
  • Dont want lengthy unbuffered wires
  • Sufficient to connect buffers within distance m
  • Depends on tech parameters

14
DRCR Algorithm
  • Similar to the ratio-cycle problem by Lawler et
    al.
  • Objective
  • Given Dref, find a path p in G with max

15
DRCR Algorithm
  • Rmax Gp Dp Dref
  • If we find Rmax, we have found p
  • Observation
  • Rmax ?ge ?de Dref
  • Edge weights we Rmax ge de
  • LHS length(p) ?we
  • How to find Rmax ?
  • Start with conjecture I
  • Iteratively refine I to obtain Rmax
  • Use binary search

16
DRCR Algorithm
  • Re-weight edges with we I ge de
  • Find shortest s-t path p (Dijkstra)
  • length(p) I Gp Dp
  • Three cases
  • I Gp Dp lt Dref
  • I Gp Dp gt Dref
  • I Gp Dp Dref

17
DRCR Algorithm
  • I Gp Dp lt Dref

Ratio for path p is better than I
18
DRCR Algorithm
  • I Gp Dp gt Dref

19
DRCR Algorithm
  • I Gp Dp Dref

20
DRCR Algorithm
  • Re-weight edges with we I ge de
  • Find shortest s-t path p (Dijkstra)
  • length(p) I Gp Dp
  • Three cases
  • I Gp Dp lt Dref
  • I Gp Dp gt Dref
  • I Gp Dp Dref

21
DRCR Algorithm
  • Polynomial time
  • O(logDmax x E log V)
  • What do we really sacrifice ?
  • Only solutions on Lower Convex hull(LCH)
  • 30-40 lie on LCH

22
Properties
  • Theorem
  • For any Dref
  • (Gp,Dp) is optimal iff its on LCH
  • As Dref decreases, cost increases
  • Decrease Dref -- move right on the curve

23
Results
  • Goal Evaluate computational feasibility
  • Experiments done on randomly generated graphs
  • 0.18µm tech from literature

24
Discussion
  • Dref is artificial
  • Observation
  • For any I, shortest path is optimum for some Dref
  • Use I to probe tradeoff curve
  • Increase I -- move left
  • Decrease I -- move right

25
Conclusion
  • Study context-aware buffer insertion
  • New problem efficient solution
  • Potential application floorplan level
    wire-planning
  • Results show viability of the approach
  • Variant to probe tradeoff curve
  • Fits applications with largely convex tradeoffs

26
Thank you!
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