Power Management of Flash Memory for Portable Devices

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Power Management of Flash Memory for Portable
Devices
Thayalan Selvam Suganthan Vivekananthan
Thushitha Kanagaratnam
ELG 4135, Fall 2006 Faculty of Engineering,
University of Ottawa November 1, 2006
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Outline

• Introduction to Flash Memory
• Why power optimization?
• Dynamic Voltage Scaling
• Simulation
• Conclusion

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Flash Memory

• Non-volatile data storage devices
• Storage of trapped electrons in cells
• Cells have different logical functions NOR or
  NAND
• NOR flash memory- Faster read time longer erase
  and write times
• NAND flash memory- Longer read time Faster erase
  and write times

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Usage of Flash Memory

• Computer's BIOS chip
• Digital cameras
• Mp3 players
• Memory Stick
• PCMCIA Type I and Type II memory cards
• PDA

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Advantages of Flash Memory

• Maintain stored information without power source
• High storage capacity and compatibility
• No physical disk to spun as in hard disks
• High processing speed- Virtually the speed is
  same as lights speed. Limiting factor is USB 2.0
• Compact size- 2mm to 3mm in width

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Why Power Optimization ?

• Demand for portable electronics devices have
  increased
• Power consumption is major obstacle in any mobile
  portable devices.
• Main task to maintain low power consumption
• Low power increases the performance and makes the
  devices durable

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Limitations on Power Optimization

• Low power consumption
• Supply voltage
• Clock frequency
• Performance time
• Circuit delay
• Low cost

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System Block Diagram of a Portable Device (mp3
player)
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Power Optimization Algorithms

• Dynamic Voltage Scaling
• Static Voltage Scaling
• Voltage Clock Scaling

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Dynamic Voltage Scaling Algorithm

• Allows devices to change voltage and speed
• Uses different voltage level for program, write
  and erase
• Uses high voltage when the work load is high
• Uses low voltage when the work load is low

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Advantages of Dynamic Voltage Scaling Algorithm

• Advanced electronic chips allows to have
  different voltage levels in devices
• Intelligence power management allows to lengthen
  the operational time by operating the devices at
  low power level, whenever possible
• Save the battery power

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Our Contributions

• Literature search on various power management
  algorithms
• Selected one Dynamic Voltage Scaling algorithm
  Dynamic Voltage Adjustment algorithm
• We proposed a new version of existing dynamic
  voltage adjustment algorithm
• The performance of the new algorithm is compared
  with the existing algorithm

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Dynamic Voltage Adjustment (DVA) Algorithm

• NOR Flash Memory Block read uses constant
  voltage level. Power management is required only
  for write and erase operations
• Each tasks have deadline time
• This algorithm based on Earliest Deadline First
  (EDF) algorithm. That is earliest deadline tasks
  are scheduled very first
• First K tasks are operated at high voltage level
  and rest of the tasks are at low voltage level
• This algorithm make sure that K is minimized

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DVA (Contd.)

• Let S R1, R2 Rn be the pending request for
  flash memory and are arranged according to its
  deadline T1, T2,Tn. Here, T1 lt T2 ltTn
• pseudo code
• For i1n
• Schedule task Ri at low voltage
• Find total time
• if total time gt Ti
• adjust first K tasks at high voltage
  (make sure that k is minimized)
• end
• End

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New version of DVA

• Pseudo code of proposed algorithm
• For i1n
• Schedule task Ri at low voltage
• Find total time
• if total time gt Ti
• adjust shortest K tasks at high voltage (make
  sure that k is minimized)
• end
• End

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Simulation Set Up
Vpp Block Write Block Write Block Erase Block Erase
Vpp Power Consumption Performance Power Consumption Performance
5 V 375 mW 0.5 S 250 mW 0.4 S
12 V 540 mW 0.4 S 480 mW 0.3 S

• Considered NOR Flash memory
• - Read time is constant. Write and
  Erase are considered
• Block Size 64 kb
• Two levels of operating voltages 5V and 12V

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Simulation Results (Voltage Level)

• First 5 tasks are operated at high voltage
• Rest of the tasks are operated at low voltage
• This algorithms make sure that the number of
  high voltage tasks are minimized
• Proposed algorithm set shortest k tasks at high
  voltage

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Simulation Results (Power Consumption)

• This graph compares the power consumption of the
  algorithms
• Graph clearly indicates the performance of the
  DVA (Dynamic Voltage Adjustment) algorithm and
  the proposed algorithm
• However, proposed algorithm have 6.475
  improvement compare to existing DVA algorithm

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Conclusion

• Dynamic Voltage Adjustment algorithm is
  considered
• The simulation results shows efficiency of the
  power management algorithm
• Dynamic Voltage Adjustment algorithm is useful in
  the implementation of portable devices which
  saves battery power
• We gained a good knowledge in various power
  management algorithms.

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Future work!

• In this context, we considered heuristic
  approaches for power management and therefore the
  solution is near optimum
• Explore efficient optimization tools to find
  exact optimal solution
• Online arrival of tasks can be incorporated
• Consider multi voltage levels. (This project we
  have considered two voltage levels). However,
  voltage levels cannot be increased as many since
  the electronic circuits limitations

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References

• 1 Tanzawa T, Takano Y, Taura T, Atsumi S. A
  Novel Bit-Line Direct- Sense Circuit that
  uses a feedback system for High-Speed Flash
  Memory. Research Institute of Electrical
  Communication, Tohoku University, Japan. January
  2006
• 2 Li-Pin Chang, Tei Wei Kuo, Shi-Wu Lo. A
  Dynamic- Voltage- Adjustment in reducing the
  power consumption of flash memory for portable
  devices. Taipei,Taiwan.
• 3 Yehua Du, Ming Cai, Jinxiang Dong. Dynamic
  Voltage Scaling of Flash Memory Storage Systems
  for Low-Power Real-Time Embedded Systems.
  Zhejiang University, Hangzhou, China

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Thank You

• Special Thanks to Dr. Habash and TAs for help
  and supports.
• Questions?????