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Proposal of new DAQ activities in the Muon Project

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P.Vande Vyvre - CERN/EP. Muon meeting - 27-Mar ... ALICE-DDL Hardware Guide for the Front-end Designers, ALICE-INT-1998-21 ... Emulates the basic functionality ... – PowerPoint PPT presentation

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Title: Proposal of new DAQ activities in the Muon Project


1
Proposal of new DAQ activitiesin the Muon Project
  • ALICE Muon - 27 Mars 2002
  • Muon Tracking Readout Integration with DDL
  • DATE V4
  • TRG/DAQ Simulation

2
DAQ Data-Flow
Detector readout electronics
DDL SIU
Point-to-point link I/O bus adapter Computer
(Sub-event building) Network Computers (Eve
nt-building, data storage) Permanent
data storage
DDL
430 430 300 380 ports 40
LDC / FEP
DDL DIU
DDL Sw
RORC
Event Building Network
DATE
GDC GDS
ROOT I/O
CASTOR
Mass Storage Servers
3
DAQ / HLT components
Detector readout electronics
DDL SIU
430 430 300 630 ports 40
DDL
LDC/FEP
DDL DIU
HLT Network
550 ports 250
RORC
HLT node
DAQ Network
GDC GDS
Mass Storage Servers
4
Proposal of new DAQ activitiesin the Muon Project
  • Muon Tracking Readout Integration with ALICE
    DAQ DDL
  • DATE V4
  • TRG/DAQ Simulation

5
Typical Workflow
Readout Electronics design
Documents
Readout Electronics simulation
VHDL module
Readout Electronics hardware tests
SIU emulator, SIU extender
DDL test software, DDL prototype
Tests with DDL
Integrate the detector with the global DAQ system
DATE readout software
6
Design and Simulation
  • Documents
  • ALICE-DDL Hardware Guide for the Front-end
    Designers,ALICE-INT-1998-21
  • ALICE-DDL Test Programs and Libraries, Users
    manual (7.4),ALICE-INT-1999-24
  • ALICE-DDL Users Guide for the SIU
    Simulator,ALICE-INT-1999-03
  • ALICE-DDL Users Guide for the SIU
    Extender,ALICE-INT-1999-04
  • ALICE-PCI RORC software Users Guide
  • ALICE-INT-2002-xx
  • VHDL module
  • Single entity basic interface of the SIU
  • Can be instantiated in higher level test benches

7
DDL integrationTools and Support
  • Hardware tools available now
  • SIU emulator
  • SIU extender
  • Prototype SIU, DIU boards
  • PCI-based RORC
  • Software tools
  • DDL test software
  • DATE readout for the DDL

8
Hardware Development
  • SIU emulator SIU extender
  • Test of detector readout electronics without the
    complete DDL
  • Emulates the basic functionality
  • Allows to spy the interface signals (connectors
    for Logic Analyzer)
  • DDL prototype DDL test software
  • DDL prototype SIU - DIU - RORC
  • DDL test software
  • Controls the Readout Electronics board
  • Transfers data from/to the Readout Electronics
    board

9
SIU PROTOTYPE
10
PCI RORC PROTOTYPE
11
PCI-RORC performance
MByte/s
Block size (Bytes)
12
Schedule
  • DDL, P-RORC and test software available now
  • New link card (common SIU and DIU) under design
  • 1/2 PMC form factor
  • Data format defined
  • Should be available Q4 2002

13
Proposal of new DAQ activitiesin the Muon Project
  • Muon Tracking Readout Integration with ALICE
    DAQ DDL
  • DATE V4
  • TRG/DAQ Simulation

14
DATE V4 (1)
  • Milestones ADC IV, TPC sector test Q2 02
  • New data format
  • New event identifier (based on TTC)
  • New event header (supports collider and fixed
    target for TB)
  • ROOT-compatible structure
  • New event builder
  • Flexible event building policy (partial event
    building, calibration)
  • Event distribution manager (load balancing,
    traffic shapping)
  • PCI-RORC read-out
  • Parallel, autonomous and asynchronous sources of
    data
  • Scattered event memory allocation in the LDCs

15
PCI RORC / DATE interface
Firmware
DATE SW DDL SW
16
LDC Benchmarking
Raw data Event fragments 20075/216 70
MB/s Achieved 80-125 MB/s
HLT Free CPU 70 Achieved 180-300 MB/s
Raw data subevent 2075/216 7 MB/s Partial
2005/216 5.5 MB/s HLT data 5 MB/s Achieved
20-40 MB/s
17
DATE V4 (2)
  • Interfaces with the High-Level Trigger (HLT)
  • New package (DataBase) for the DATE configuration
  • Detectors
  • Triggers
  • Event building policies
  • New architecture run control
  • Using the SMI package (Delphi, BaBar, LHCb)
  • Formal description of the system with state
    machines
  • Control sequences described with an ad-hoc
    language
  • Control and synchronization with external
    processes

18
Current DATE Run Control
LDC
inetd
RC server
Run Params
Commands States
SHM
Recorder
Readout
19
New DATE Run Control
LDC
inetd
RC server
Run Params
Other server
Commands States
DATE RUN
LDC
SHM
GDC
Recorder
Readout
RCServer
Other server
SMI
20
State Machines
Run Control
Start recorder Start readout Start other
server Wait ...
21
(No Transcript)
22
Performance monitoring - AFFAIR
LDC
DATE
Evt. Build. Switch
DATE performances
GDC
ROOT I/O
Files
ROOT Plots for Web
Disk Server
CASTOR
Tape Server
CASTOR performances
23
Proposal of new DAQ activitiesin the Muon Project
  • Muon Tracking Readout Integration with ALICE
    DAQ DDL
  • DATE V4
  • TRG/DAQ Simulation

24
TRG/DAQ simulation
  • Assuming a realistic behaviour of detectors, TRG
    and DAQ
  • Will the experiment behave as expected ?
  • TRG/DAQ simulation
  • Input parameters
  • Physics requirements, detectors parameters
  • TRG and DAQ architectures
  • Measured or realistic performances of the
    components
  • Results
  • Trigger rates effectively achievable
  • Buffers occupancy
  • Fraction of DAQ performance used by each data
    stream
  • Current simulation based on Ptolemy
  • TRG/DAQ simulation available for the whole
    collaboration

25
DAQ/trigger simulation
Poisson distribution 6000 Hz
Interaction source
CE, MB, EL, MU, background 1200 Hz
Muon
Trigger detectors
Inner tracking system
TPC
TRD
Particle identifcation
Multi Event bufffers
216
1.2 ?sec
x 435
DDL
1oo Mb/s
L0 trigger
RORC
RORC
RORC
RORC
RORC
RORC
RORC
RORC
RORC
RORC
RORC
x 334
RORC
5.5 ? sec
1oo Mb/s
L1 trigger
x 278
LDC
LDC
LDC
LDC
LDC
LDC
88.0 ? sec
60 Mb/s
L2 trigger
HLT trigger
EDM
Null SWITCH
Trigger system
40 Mb/sec
GDC
x 1oo
GDC
GDC
GDC
1.25 GB/s
PDS
PDS
PDS
PDS
26
LDC buffers occupancy
  • 20 MB and 20 CE
  • Pixel and TRD always busy
  • 18 MB and 18 CE
  • Pixel and TRD OK

27
L2 Trigger Rates
  • L2 rates
  • CE, MB, EL 20 Hz
  • MU 420 Hz
  • Artificially limit heavy bandwidth rates.
  • CE, MB 17 Hz
  • MU 720 Hz
  • EL 220 Hz
  • Dedicate GDCs for MU events decouple from GDC
    backpressure of other triggers
  • MU 1050 Hz

Normal setup
Improving Rare/interesting triggers
28
Bandwidth to Storage
  • L2 rates
  • CE, MB, EL 20 Hz
  • MU 420 Hz
  • Artificially limit heavy bandwidth rates.
  • CE, MB 17 Hz
  • MU 720 Hz
  • EL 220 Hz
  • Dedicate GDCs for MU events to decouple from GDC
    backpressure of other triggers
  • MU 1050 Hz

Normal setup
Improving Rare/interesting triggers
29
Current Developments
  • Support arbitrary number ( i.e. 40) of trigger
    classes
  • Make trigger and detectors closer to reality
    (work with TRG project)
  • For every bunch crossing ? physics of the
    collision
  • Detector response f (physics of the collision,
    detector properties)
  • Detector response ? Trigger system ? Trigger
    L0/L1/L2
  • Need input from detector on readout behaviour

Bunch crossing generator
Physics package
Physics data
Trigger system
Detector specific data
Detector
Detector
Detector
L0/L1/L2 signals
Detector
Detector
30
Conclusion
  • New activities needed in the Muon project
  • Muon Tracking Readout
  • Q4 2002
  • DDL integration
  • DATE V4
  • TRG/DAQ simulation
  • Muon readout parameters
  • Perform simulation Muon trigger(s) in ALICE
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