Ultrafast All-optical Self Clock Extraction based on Two Inline Symmetric Mach-Zehnder Switches

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Ultrafast All-optical Self Clock Extraction based
on Two Inline Symmetric Mach-Zehnder Switches

• H. Le Minh, Z. Ghassemlooy and Wai Pang Ng
• Optical Communications Research Group
• Northumbria University, UK
• http//soe.unn.ac.uk/ocr/

ICTON 2006, 18th-22th June 2006, Nottingham, UK
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Contents

• Introduction
• Clock extraction overview
• Proposed asynchronous clock extraction based on
  SMZs
• Simulation results
• Conclusions

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Introduction
1- Optical bandwidth demands
Solution Increasing the aggregate bitrates by
using the multiplexing techniques and narrower
signal pulse-width Issues Requiring higher-speed
synchronization, processing and switching
capabilities in optical network
2- Optical transparency
Solution All-optical synchronization, processing
and switching to avoid the bottleneck caused by
employed low-response electronic devices (40
Gbps)
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All-optical Clock Extraction
Clock Extraction
Clock, header and payload are the same intensity,
polarization and wavelength

• Clock extraction requirements
• Asynchronous and ultrafast response
• High on/off contrast ratio of extracted clock

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All-optical Clock Self-extraction Schemes

• Gain saturation intensity discriminator
• Semiconductor optical amplifier (SOA)
  intensity threshold detector
• Self-phase modulation
• SOA filter
• Self-controlling all-optical switches
• Optical switch (TOAD, SMZ, UNI) with a feed back
  loop (extracted clock as the switchs control
  signal)
• Optical switch with incoming packet as the
  switchs control signal

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Symmetric Mach-Zehnder Switch

• All-optical SMZ switch
• Compact size (integrated capability)
• Ultrafast response (ps)
• Low controlling energy consumption (ltpJ)
• Flexible controlling schemes Wavelengths,
  Orthogonal polarizations, Propagation directions

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Clock Self-extraction with single SMZ
Clk
Data packet
GCP
1?2
SOA1
2?2
SMZ-1
1?2
?in
2?2
2?2
2?2
?SW
SOA2
Optical fiber span
Attenuator
Amplifier
Optical delay
Input packet is used as the input and control
signals for SMZ
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Clock Self-extraction with single SMZ
CP1
GCP
1?2
SOA1
2?2
SMZ-1
1?2
?in
2?2
2?2
2?2
?SW
SOA2
CP2
Optical fiber span
Attenuator
Amplifier
Optical delay
Input and control signals for SMZ are delayed by
?in and ?SW, respectively, to generate the
switching window for the clock pulse (first bit)
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Clock Self-extraction with single SMZ
GCP
1?2
SOA1
2?2
SMZ-1
1?2
?in
2?2
2?2
2?2
?SW
SOA2
Optical fiber span
Attenuator
Amplifier
Optical delay
Successive switching windows produce residual
signals followed the extracted clock pulse ?
results in a low on/off contrast ratio
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Clock Self-extraction with Inline SMZs
CP1
Clk
GCP
1?2
1?2
SOA1
SOA1
?
2?2
2?2
SMZ-2
SMZ-1
1?2
1?2
2?2
?in
2?2
2?2
?in
2?2
2?2
2?2
?SW
SOA2
?SW
SOA2
CP2
Optical fiber span
Attenuator
Amplifier
Optical delay
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Clock Self-extraction with Inline SMZs
GCP
1?2
1?2
SOA1
SOA1
?
2?2
2?2
SMZ-2
SMZ-1
1?2
1?2
2?2
?in
2?2
2?2
?in
2?2
2?2
2?2
?SW
SOA2
?SW
SOA2
Optical fiber span
Attenuator
Amplifier
Optical delay
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Clock Self-extraction with Inline SMZs
Clk
GCP
1?2
1?2
SOA1
SOA1
?
2?2
2?2
SMZ-2
SMZ-1
1?2
1?2
2?2
?in
2?2
2?2
?in
2?2
2?2
2?2
?SW
SOA2
?SW
SOA2
Optical fiber span
Attenuator
Amplifier
Optical delay
Because the control signals for the second SMZ
are low intensity in the followed pulses ?
results in a higher on/off contrast ratio in
extracted clock pulse
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Simulation Results Main parameters
System parameters
Parameters Values Parameters Values
Data packet bit rate 100 Gb/s SMZ-1 amplifier gain GCP 9 dB
Wavelength 1554 nm SMZ-2 attenuation ? 12 dB
Data control pulse FWHM 2 ps Switching window width TSW 6 ps
Input data pulse energy 2 fJ SMZ-input delay ?in 3 ps
Fibre (SMF DCF) 30 and 5 km Packet guard time 0.5 ns
SOA parameters
Parameters Values Parameters Values
SOA length LSOA 0.5 mm Carrier density transparency 1.4 ? 1024 m-3
SOA width 3 ? 10-6 m Recombined Const. A 1.43 ? 108 s-1
SOA height 80 ? 10-9 m Recombined Const. B 1 ? 10-16 m3s-1
Linewidth enhancement 4 Recombined Const. C 3 ? 10-41 m6s-1
Confinement factor 0.2 Initial carrier density 3 ? 1024 m-3
Differential gain 2.78 ? 10-20 m2 Injected current 150 mA
Internal losses 40 ? 102 m-1 Spontaneous emission factor 2
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Simulation Results Clock Self-extraction

1. Input packets
2. Extracted clock by single SMZ. The residual
   signal intensities are high, but fading due to
   SOA gain saturation with high-powered control
   pulses
3. Extracted clock by two-inline SMZs. The residual
   signals are suppressed ? improving the on/off
   contrast ratio

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Simulation ResultsContrast ratio vs. packet
input energies

• The contrast ratio (CR) is stable with a wide
  range of input energy values
• CR is achieved of 10 dB and 22 dB with single
  and two-inline SMZ clock self-extraction,
  respectively
• Low and very high amplified (i.e. GCP) control
  signals results in reduced CR

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Conclusions

• Two-inline clock self-extraction module
• Achieving high performance
• High on/off contrast ratio (gt 20 dB) of the
  extracted clock pulse
• Allow all-optical clock extraction from the
  ultrafast packets (at 100 Gb/s) due to the
  ultrafast response of SMZ with its switching
  window width being in a few picoseconds
• CR is stable in a large range of the input energy
  values
• Reducing the complexity
• Simple and integrated capability due to the SMZs
  compact structure
• Inline SMZs avoids the feedback-loop which might
  cause the instability and delay

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Acknowledgements

• Northumbria University for sponsoring and
  supporting this research work.

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Thank you!