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Differential surface charging of the dielectric during plasma etching and surface charge leakage kin

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Title: Differential surface charging of the dielectric during plasma etching and surface charge leakage kin


1
Differential surface charging of the dielectric
during plasma etching and surface charge leakage
kinetic
  • Original Authors MK Abatchev, BJ Howard , DS
    Becker , RL Stocks and J Chapman
  • Micron Texhnology, Inc.
  • Presented by Venu Krishnardula for EE7730
  • Auburn University

2
Outline
  • Purpose of the paper
  • Some Fundamentals
  • Experimental details
  • Conclusions

3
Purpose of the paper
  • The paper reported their investigations of the
    kinetics of charge leakage.
  • To know the dependence of the aspect ratio and
    the charge density

4
Fundamentals
  • Flux of charged particles on to the surface
    during plasma processing of dielectric materials
    results in surface charging.
  • The charge density and its distribution along the
    surface depend on plasma parameters like plasma
    uniformity , energy and angle distribution of
    ions and electrons and Structure geometry
  • The differential surface charging can result in
    distortion of the etch profile and it is one of
    the possible sources of etch stop phenomenon
    during dielectric etch process.

5
Plasma-Induced Charging in Microstructures
Directionality difference between ions
andelectrons induces local charging and
potentialbarrier (order of sheath voltage) in
micro-pattern. Thin gate-oxide damage and notching
http//kstar.knfp.net/kpsdpp/KPS_Poster/2002_kps/p
df_file/KPS2002spring_H02_kss.pdf
6
http//kstar.knfp.net/kpsdpp/KPS_Poster/2002_kps/p
df_file/KPS2002spring_H02_kss.pdf
7
http//kstar.knfp.net/kpsdpp/KPS_Poster/2002_kps/p
df_file/KPS2002spring_H02_kss.pdf
8
Experimental details
  • Two types of samples were used
  • 1. 20000A thick film of boron-phosphorous doped
    silicon glass (BPSG)deposited on p-type Si.
  • 2. 20000A thick film of BPSG deposited on 2000A
    thick thermal oxide on
  • p-type.
  • 8300A thick DUV photo resist with a hole
    patterns of 0.19 micron in diameter was used as
    the etching mask.
  • To improve the pattern definition 300A thick
    DARC(deposited Anti-Reflective Coating) underlay
    was deposited on BPSG.
  • Samples were etched at different etch times
    to produce holes of different aspect ratios in
    BPSG.

9
Experimental details contd..
  • After ashing of the photoresist in the oxygen
    plasma, wafers have been processed through a wet
    clean to neutralize the surface charge.
  • Then they were exposed to Ar plasma for
    recharging the surface. Applied materials P5000
    MRIE etchers were used for generating the AR
    plasma.
  • Profile and depth holes were observed under the
    SEM.
  • Surface voltage versus time after plasma
    processing has been measured using the CPD
    technique.

10
CPD technique
  • A new method for on-line monitoring of oxide
    surface charge accumulation has been developed
    using CPD (Contact Potential Difference), a
    material analytical technique. In this work, CPD
    maps of oxide-covered wafers subjected to plasma
    processing were related to capacitor
    breakdown-voltage maps, as well as to the plasma
    parameter profiles2.
  • Figure 2. Map of the oxide surface charge on a
    wafer exposed to a 1000 W microwave power, 2
    mTorr, 50 W RF power, non-uniform plasma.
    Different shades reflect different amount of
    charge stored on the wafer surface. The highest
    magnitude of the charge is found on the center of
    the wafer. The displayed dots represent the
    location of the floating potential measurements.

http//cpam.engr.wisc.edu/newsletter/VOL9NUM2/char
ging.html
11
Charge leakage
12
Conclusions
  • Experimental data showed that the magnitude of
    the residual charge accumulated on the surface
    during charging is a function of the aspect
    ratio.
  • Surface voltage not a monotonic function of the
    etch depth, but has amaximum at a certain depth.
  • Surface voltage reduces considerable versus time
    for deep holes ( thin remained dielectric), while
    it was relatively consistent for shallow holes.
  • These results suggested that the charge does leak
    between the bottom of a hole and the Si
    substrate.
  • And the charge leaks faster for a thinner
    remained dielectric film.
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