Final Project 14:332:480 Capstone Design 16:332:578 DSM VLSI Microprogrammable Dinger Alarm Clock wi

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Final Project14332480 Capstone
Design16332578 -- DSM VLSIMicroprogrammable
Dinger Alarm Clock with Drizzle-Blat Chip

• Student A
• Student B
• Student C
• Student D
• Student E
• Student F

Electrical and Computer Engineering Dept. Rutgers
University
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Project Description
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Need for this Design
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Design Specifications
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Data Book Description (Partial)
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System Block Diagram
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System Timing for Some Signals
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Work Assignment
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Example of Interesting Module
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Critical Timing Paths in Design
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Redesign to Meet Specifications
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Testing Method
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Design Partitioning for Test
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Chip Realization

• Critical Path Analysis
• Estimated Clock Period and Slack
• Allowance for Clock Skew
• Chip Power Consumption and Estimation Method
• Estimate of Bus Width for Power Necessary to
  Avoid Metal Migration

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Economic Analysis
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Bill of Materials
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Health and Safety Issues
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Environmental Implications
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Did Design Meet Specifications?
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Criticisms

• Synopsys
• Cadence
• Rutgers Test-Pattern Generator

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Conclusions