SAAEI 2005

1
A Unity Power Factor Correction Preregulator with
Fast Dynamic Response Based on a Low-Cost
Microcontroller
Applied Power Electronics Conference and
Exposition APEC 2007
D.G. Lamar, A. Fernández,, M. Arias, M.
Rodríguez, J. Sebastián
February 2007
2
Presentation Topics

• Introduction PFC and Power Factor preregulator

• PFC preregulator with fast dynamic response

• Limits of the PFC preregulator with fast dynamic
  response

Presentation Topics

• New control strategy based on a modified
  sinusoidal reference

• A low-cost microcontroller generating the
  modified sinusoidal reference

• Experimental results

• Conclusions

3
Power Factor Correction
The injection of low frequency harmonics of
ig(t) can distort the main
All the electronic equipment must comply with
international regulations
Introduction
IEC 61000-3-2 classify the electronic equipment
depending their application (in four classes
A,B,C and D)
The harmonic content of ig(t) to be measured at
nominal input must be lower than the limit set by
the regulation
4
Passives PFC solutions
Basic idea A reactive device between the input
rectifiers and the input bulk capacitor in order
to soft ig(t)
Introduction

• Low cost and simply
• Low size and robust
• Good efficiency
• Suitable for low power levels (75-300 W)
• No EMI

• Non-sinusoidal Input current
• No regulated output voltage
• No suitable for wide input voltage range
• Bad efficiency P gt300 W

5
PFC Single-Stage
Basic idea A small part of the total energy is
only processed twice in order to shape the input
current
Introduction

• Output voltage regulated
• Good efficiency
• Suitable at medium power levels (300-600 W)

• Non-sinusoidal Input current
• No suitable for wide input voltage range
• Bad efficiency P gt600 W
• EMI

6
PFC Two-Stage solution
Basic idea The correction factor and the output
voltage response is divided in two stages
2nd Stage Gives fast dynamics and galvanic
isolation
1st Stage Power Factor Preregulator
Sinusoidal input current
Fast dynamics and galvanic isolation
Slow dynamics
Introduction
7
One stage PFC solution
Introduction
8
One stage PFC solution
Introduction
There are many applications in which the load
remains more or less constant and no extremely
fast output voltage response is needed
9
PFC preregulator
Low-pass filter placed in the voltage feedback
loop filter the 2fline ripple of the output
voltage (VEA)
PFC preregulator with fast dynamics
The input current is sinusoidal but the dynamic
response of the output voltage is slow.
10
PFC preregulator with fast dynamics
If the bandwidth of the filter is increased then
the vea(t) ripple is introduced into the output
voltage feedback loop
PFC preregulator with fast dynamics
The input current is distorted but the dynamic
response of the output voltage is relatively fast.
11
Limits of the PFC preregulator (1st dynamic limit)
Can the output voltage response be increased as
much as I want?
Limits of the PFC preregulator with fast dynamics
If the output voltage bandwidth is increased (by
increasing ADC or fc) then the output voltage
response has improved
However the input current distortion is increased
as increases the output voltage bandwidth
The output voltage response can be increased
keeping the harmonic content of the input current
lower than international regulation limits.
12
Limits of the PFC preregulator (2nd dynamic limit)
With independence of regulations. Can the output
voltage response be increased as much as I want?
Limits of the PFC preregulator with fast dynamics
The energy is stored at 2fline
The better output voltage response is the inverse
value of twice the line frequency.
13
Input current static analysis
Input current is proportional to the power
processed by the PFC preregulator with fast
dynamic response
New control strategy modified sinusoidal
reference
Input current is inverse proportional to the peak
input voltage of the PFC preregulator with fast
dynamic response
The input current relative distortion for a PFC
preregulator design depends on

f(ADC,fC,CO)
The relative distortion of the input current does
not depend on the power processed by the PFC
preregulator with fast dynamic response
14
Input current static analysis (Simulation)
New control strategy modified sinusoidal
reference
15
Input current static analysis (Simulation)
Load step from 1/3Pmax to Pmax ? output voltage
loop design ADC40 y fC10 Hz
New control strategy modified sinusoidal
reference
Load step from 1/3Pmax to Pmax ? output voltage
loop design ADC40 y fC1 kHz
16
Modified sinusoidal reference
The relative distortion of the input current is
equal at initial and final stages of the load
step
New control strategy modified sinusoidal
reference
Modified sinusoidal reference
vea(t)
Modified reference as a sinusoidal ig(t) divided
by vea(t).
17
Modified sinusoidal reference
The relative distortion of the input current is
equal at initial and final stages of the load
step
New control strategy modified sinusoidal
reference
Modified sinusoidal reference
vea(t)
Modified reference as a sinusoidal ig(t) divided
by vea(t).
18
Modified sinusoidal reference (Simulactón)
Load step from 1/3Pmax to Pmax for a output
voltage loop design ADC40 y fC1 kHz with the
modified sinusoidal reference
New control strategy modified sinusoidal
reference
A sinusoidal input current and relatively fast
response is obtained
19
Low-Cost microcontroller
Low-cost microcontroller generating the reference
20
Low-Cost microcontroller
Low-cost microcontroller generating the reference
21
Low-Cost microcontroller
Low-cost microcontroller generating the reference
22
Prototype

• Boost converter

• Wide input voltage 90-265 Vrms

• Output voltage 400 V

• Switching frequency 100 kHz

Experimental results

• Output power 500 W

• PIC 16F627

• Synchronization circuit ? internal comparators

• UC3854

23
Input current
Experimental results
24
Output Dynamic Response
Load step from 1/3Pmax to Pmax for different
output voltage loop bandwidth designs
Experimental results
25
Dynamic response
Load step from 1/3Pmax to Pmax for a output
voltage loop design ADC40 y fC1 kHz with the
modified sinusoidal reference
Experimental results
26
Conclusions

• PFC preregulator converters can be used without
  the cascade connected DC/DC converter ? PFC
  preregulators with fast dynamics

• The output voltage bandwidth is increased

• The input current is distorted

• The output voltage bandwidth can be increased
  keeping the harmonic content of the input current
  lower than international regulation limits

Conclusions

• The better output voltage response is the inverse
  value of twice the line frequency ? No extremely
  fast output voltage response is needed

• Relative distortion of ig(t) not depend on P ?
  New control strategy based on a properly modified
  sinusoidal reference

• PFC preregulators with fast dynamics (lower than
  1/ 2fline) and sinusoidal input current

27
Thanks!!
D.G. Lamar, A. Fernández,, M. Arias, M.
Rodríguez, J. Sebastián
February 2007