Enabling Automated Design Space Exploration for Parallel Embedded Systems

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(No Transcript)
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Virtual platforms and timing analysis status,
challenges, and future directions

• Marco Di Natale
• GM Research and Development
• ECI/ECSA Lab. Warren, MI USA

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Outline

• Automotive architecture trends and challenges
• Platform-based system-level design and timing
  evaluation metrics
• Issues with model-based design
• Time predictability and timing isolation
• From analysis to synthesis

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Evolution of Integrated Functions
Post-2014
function17
function16
function15
function14
to 2012/14
function13
function12
function11
function10
to 2010/12
function9
function8
function7
function6
function5
ACC
Pre-2004
Stabilitrak 2
Onstar emergency notification
Speed-dependant volume
Body
HVAC
Telematics
Transmiss.
Engine
Occupant Information
Exterior lighting
Occ. protection
Infotainm.
Environm. sensing
Object detection
Suspension
Steering
Brake
Subsystem
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Automotive architecture trends

• Horizontally-integrated functions are becoming
  key differentiators and are gaining increasing
  authority
• An increasing number of functions will be
  distributed on a decreasing number of ECUs and
  enabled through an increasing number of smart
  sensors and actuators
• today gt 5 buses and gt 30 ECUs
• 90 of innovation in cars for the foreseeable
  future will be enabled through the Electronic
  Vehicle Architecture
• Transition from single-ECU Black-box based
  development processes to a system-level
  engineering process
• System-level methodologies for quantitative
  exploration and selection,
• From Hardware Emulation to Model Based
  Verification of the System
• Architectures need to be defined years ahead of
  production time, with incomplete information
  about (future) features
• Multiple non-functional requirements can be
  defined

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Outline

• Automotive architecture trends and challenges
• Platform-based system-level design and timing
  evaluation metrics
• Issues with model-based design
• Time predictability and timing isolation
• From analysis to synthesis

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Deployment Design Process
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Functional model
Input interface
Output interface
signal
s2
s1
s4
f2
f1
f3
period is_trigger precedence
f4
s3
Functional model
function
s5
period activation mode
Jitter constraint
f5
f6
deadline
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Architecture model
s2
s1
s4
f2
f1
f3
f4
s3
Functional model
s5
f5
f6
ECU2
ECU1
ECU3
Execution architect. model
OSEK1
bus
CAN1
speed (b/s)
ECU
clk speed (Mhz) register width
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Deployment model
s2
s1
s4
f2
f1
f3
f4
s3
Functional model
s5
f5
f6
System platform model
Execution architect. model
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Tool integration platform
System-level virtual prototyping and architecture
selection
Requirements
Virtual prototyping (virtual platforms)
Model
Model
Model
Validation
Model
Model
Model
Debugging
Unit Testing
Prototype
Prototype
Prototype
Model
Model
Model
Integr. Testing
Prototype
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Design Process and Requirement
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Functional Model An example
Function Example xxx
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Architecture Model An example
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Deployment An example
End-to-end latencies ECU and bus utilizations
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Periodic Activation Model
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Data Driven Activation Model
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Case study 1

• By transmitting messages on event, the worst
  case latency can be reduced in most cases
• By properly allocating functions to ECUs the
  end-2-end latency can be improved

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Outline

• Automotive architecture trends and challenges
• Platform-based system-level design and timing
  evaluation metrics
• Issues with model-based design
• Time predictability and timing isolation
• From analysis to synthesis

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Issues with model-based development

• Model-based design methodologies
• improve the quality and the reusability of
  software.
• The possibility of defining components
  (subsystems) at higher levels of abstraction and
  with well defined interfaces allows separation of
  concerns and improves modularity and reusability.
  
• The availability of verification tools (often by
  simulation) gives the possibility of a
  design-time verification of the system
  properties.
• However, most modern tools for model-based design
  have a number of shortcomings

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Issues with model-based development

• Lack of separation between the functional model
  and the architecture model
• Lack of support for the definition of the task
  and resource model
• Insufficient support for the specification of
  timing constraints and attributes
• Lack of modeling support for the analysis and the
  back-annotation of scheduling-related delays
• Issue of semantics preservation

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Outline

• Automotive architecture trends and challenges
• Platform-based system-level design and timing
  evaluation metrics
• Issues with model-based design
• Time predictability and timing isolation
• Composability and AUTOSAR
• From analysis to synthesis

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From priorities to resource reservation

• Tasks from different applications (IPs) may be
  executed in the same ECU
• freedom of relocating code as in AUTOSAR
• Functional protection
• Enabled by processes with protected addressing
  space (as in OSEK revision)
• Temporal protection
• Protect each the temporal behaviour of each task
  from the other tasks
• Each task should execute as if it were on a
  dedicated slower processor

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Priority-based scheduling

• What is wrong with (OSEK-like) static priorities
  ?

executing too much...
Deadline miss!
Correct behavior
Timing fault
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Resource reservation

• Class of techniques that provide temporal
  protection
• Each task is assigned a fraction of the resource
• The task is allocated at least the reserved
  fraction of the resource
• The concept has been around for 15 years in
  Communication Networks
• Packet switching (PS, GPS, WFQ, WF2Q, )
• Type of guarantees
• The services actually receivedby the stream will
  be bound between min (lag) and max (lead) of
  the share it should receive

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Outline

• Automotive architecture trends and challenges
• Platform-based system-level design and timing
  evaluation metrics
• Issues with model-based design
• Time predictability and timing isolation
• Composability and AUTOSAR
• From analysis to synthesis

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Opportunities for synthesis
Number and type of ECUs and buses System topology
Periods Activation modes
Function to ECU allocation
Task and message priorities
Function to task mapping
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QA
Thank you!