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A TCP/IP Based Multi-Device Programming Circuit

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Title: A TCP/IP Based Multi-Device Programming Circuit


1
A TCP/IP Based Multi-Device Programming Circuit
David V. Schuehler Harvey Ku John
Lockwood http//www.arl.wustl.edu/arl/project
s/fpx
2
Goals
  • Develop an efficient mechanism for programming
    multiple devices
  • Program devices with identical content
  • Allow devices to be placed throughout the
    Internet
  • Support a hardware-based solution
  • No microprocessor or soft core

3
Solution
  • A hardware circuit which extracts device
    configuration information from TCP/IP data flow

4
System Configuration
  • Programming Station
  • Transmits configuration file
  • End Station
  • Terminates TCP/IP connection
  • Acts as data sink
  • One or More Target Devices
  • Contains programmer circuit target component
  • Network Connectivity
  • IP route from programmer to each device and end
    station

5
Development Platform FPX Module
Oscillators
Static Ram
RAD (XCV2000E)
NID (XCV600E)
PROM
6
FPX Internal Structure
  • RAD Reprogrammable Application Device
  • Xilinx XCV2000E FPGA
  • External SRAM/SDRAM
  • Reprogrammable
  • NID Network Interface Device
  • XCV600E FPGA
  • Controls FPX
  • Programs RAD
  • Forwards traffic

7
Programmer Circuit Components
8
Testing Configuration
9
Washington UniversityGigabit Switch Environment
Stacked FPX Modules
10
Stacked FPX Devices
11
Programmer Results
Programmer TCP-Splitter Protocol Wrappers
Post Place Route Clock Frequency 71.76 MHz
Slice Flip Flops 5668 (14)
LUTs 5210 (13)
Block RAM 47 (29)
Time to program 3 devices with 2.2MByte config file 1.102 seconds
12
Comparative Transmit Performance(1MByte bitfile)
(wide area throughput 8Mb/s) (switch delay
100usec)
Devices Programmed (N) One-at-a-time Programming (Nfilesize/bitrate) Multi-Device Programming (size/rate Ndelay)
1 1 sec 1 sec
10 10 sec 1 sec
100 1.7 min 1 sec
1,000 16.7 min 1.1 sec
10,000 2.8 hrs 2 sec
100,000 1.2 days 11 sec
13
Comparative Transmit Performance(1MByte bitfile)
(wide area throughput 80Mb/s) (switch delay
100usec)
Devices Programmed (N) One-at-a-time Programming (Nfilesize/bitrate) Multi-Device Programming (size/rate Ndelay)
1 .1 sec .1 sec
10 1 sec .1 sec
100 10 sec .1 sec
1,000 1.7 min .2 sec
10,000 16.7 min 1.1 sec
100,000 2.8 hrs 10.1 sec
14
Summary
  • A hardware circuit has been developed which
    supports the simultaneous programming of multiple
    devices
  • Devices can be dispersed throughout the Internet
    at disparate locations
  • Programming information is transmitted once and
    received by all devices
  • Simple to add or remove devices from programming
    chain

15
Multi-Device Programmer
  • A hardware circuit which extracts device
    configuration information from TCP/IP data flow
    and programs remote devices

16
Configuration
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