Reconfigurable architecture of adaptive median filter — An FPGA based approach for impulse noise suppression || 2015-2016 IEEE Matlab Projects - PowerPoint PPT Presentation

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Reconfigurable architecture of adaptive median filter — An FPGA based approach for impulse noise suppression || 2015-2016 IEEE Matlab Projects

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Reconfigurable architecture of adaptive median filter — An FPGA based approach for impulse noise suppression || 2015-2016 IEEE Matlab Projects Training Contact: IIS TECHNOOGIES ph:9952077540,landline:044 42637391 mail:info@iistechnologies.in – PowerPoint PPT presentation

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Title: Reconfigurable architecture of adaptive median filter — An FPGA based approach for impulse noise suppression || 2015-2016 IEEE Matlab Projects


1
Reconfigurable Architecture of Adaptive Median
Filter An FPGA Based Approach for Impulse Noise
Suppression
  • Presented by
  • IIS TECHNOLOGIES
  • No 40, C-Block,First Floor,HIET Campus, North
    Parade Road,St.Thomas Mount, Chennai, Tamil Nadu
    600016.
  • Landline044 4263 7391,mob9952077540.
  • Emailinfo_at_iistechnologies.in,
  • Webwww.iistechnologies.in

2
ABSTRACT
  • In this paper, low complexity reconfigurable
    hardware architecture for adaptive median filter
    is proposed and a comparative study of hardware
    based median and adaptive median filter is
    presented. An efficient development of median
    adaptive median filter is presented for removal
    of impulse noise mainly salt pepper noise from
    digital Images.
  • Performance measurement of mean square error
    (MSE) and peak signal-to-noise ratio (PSNR) is
    done to compare these two filters. This paper
    proposes hardware implementation which is highly
    required for real time execution.
  • Field Programmable Gate Arrays (FPGAs) are widely
    used for real time processing where the
    requirements of time, speed, area, power become
    strict. The algorithms of these two filters are
    discussed in detail which is followed by FPGA
    based solutions. Simulation is done using Xilinx
    ISE 14.5 software of XILINX platform where the
    implementations utilize on Genesys VERTEX V FPGA
    Board of XC5VLX50T device family.
  • Keywords--Adaptive Median Filter, Median Filter,
    Real-time Filtering, Salt-and-pepper noise,
    Impulse Noise, Field programmable gate array
    (FPGA).

3
Introduction of the Median Filter
  • The field of image processing has wide and
    important uses. Any field of work that involves
    images or videos has uses for research in this
    area. The results of this project will influence
    how images are processed and enhanced.
  • Application stemming from the results of this
    project will be important to image and video
    enhancement applications because this research
    project provides insights on the best techniques
    in filtering and enhancing each kind of image.
  • This project explores the effects of the median
    filter on different types of images. The fields
    explored include its effects on digital images of
    people, scenery, and objects. The quality of
    filtered images will be determined in a
    subjective manner.
  • The effects of human errors and subjectivity do
    not detract from this study because image
    filtering is done for subjective and aesthetic
    qualities, so this method of evaluation makes
    sense as well. The median filter considers each
    pixel in the image in turn and looks at its
    nearby neighbors to decide whether or not it is
    representative of its surroundings.
  • Instead of simply replacing the pixel value with
    the mean of neighboring pixel values, it replaces
    it with the median of those values. The median is
    calculated by first sorting all the pixel values
    from the surrounding neighborhood into numerical
    order and then replacing the pixel being
    considered with the middle pixel value.

4
PROPOSED METHOD
  • The proposed system is developed in order to get
    the following
  • Input size is varied and results are analyzed
  • Gray code input is given and their results are
    analyzed

5
Advantages of the PROPOSED METHOD
  • The advantage of the proposed system is having
    such that the newly developed algorithm is having
    low delay than the existing system.

6
Block Diagram
7
Flowchart
8
TOOLS AND SOFTWARE USED
  • Simulation Tool Model-Sum 6.3c
  • Synthesis Tool Xilinx ISE 12.1
  • Image Processing Tool MATLAB 2010

9
Reference
  • 1 Rafael C. Gonzalez, and Richard E. woods,
    Digital Image Processing, 3rd edition, Prentice
    Hall, 2009.
  • 2 W.K. Pratt, Digital Image Processing.
    Wiley-Interscience, 1991
  • 3 H. Hwang and R.A. Haddad, Adaptive Median
    Filters New Algorithms and Results, IEEE Trans.
    Image Processing, vol. 4, no. 4, pp. 499 - 502,
    Apr. 1995
  • 4 S. Zhang and M.A. Karim, A New Impulse
    Detector for Switching Median Filter, IEEE Signal
    Processing Letters, vol. 9, no. 11, pp. 360-363,
    Nov. 2002
  • 5 R.H. Chan, C.W. Ho, and M. Nikolova,
    Salt-and-Pepper Noise Removal by Median-Type
    Noise Detectors and Detail-Preserving
    Regularization, IEEE Trans. Image Processing,
    vol. 14, no. 10, pp. 1479-1485, Oct. 2005
  • 6 P.E. Ng and K.K. Ma, A Switching Median
    Filter with Boundary Discriminative Noise
    Detection for Extremely Corrupted Images, IEEE
    Trans. Image Processing, vol. 15, no. 6, pp.
    1506-1516, June 2006

10
OUTPUT
  • SIMULATION
  • HARDWARE

11
Contact
  • IIS TECHNOLOGIES
  • No 40, C-Block,First Floor,HIET Campus, North
    Parade Road,St.Thomas Mount, Chennai, Tamil Nadu
    600016.
  • Landline044 4263 7391,mob9952077540.
  • Emailinfo_at_iistechnologies.in,
  • Webwww.iistechnologies.in
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