Flipflop Selection to Maximize TDF Coverage with Partial Enhanced Scan

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Flip-flop Selection to Maximize TDF Coverage with
Partial Enhanced Scan

• Gefu Xu
• Adit D. Singh
• Auburn University, USA

2007 IEEE 16th Asian Test Symposium
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Outline

• Introduction
• Overview of Enhanced Scan designs
• Dual Enhanced Scan Flip-flop Enhanced DTSFF
  (Delay Test Scan Flip-flop)
• Partial Enhanced Scan Design
• The Structure of Partial Enhanced Scan Design
• Scan-unit Selection for Partial Enhanced Scan
• TDF coverage of Partial Enhanced Scan
• Refining Scan-unit Selection
• Interchange Procedure
• Conclusion

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Enhanced Scan Designs
1) Classical Enhanced Scan with alternating
regular and scan FFs
2) Enhanced Scan with hold latches
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Enhanced Scan FFs with Slow Scan Enable Signals
2)Enhanced DTSFF (Delay Test Scan Flip-flop)
1)Dual Enhanced Scan Flip-flop 1
1 N. Devtaprasanna, A. Gunda, P. Krishnamurthy,
S. M. Reddy and I. Pomeranz, "Methods For
Improving Transition Delay Fault Coverage Using
Broadside Tests", in Proc. International Test
Conference, 2005, pp. 256-265.
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Partial Enhanced Scan Design
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Example Circuit with Each Node Labeled with The
Probability of Logic 0
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Ideally desired relationship between Partial
Enhanced Scan FF percentage and Fault coverage
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Experiment Procedure

• Calculate the P(0) of the input of each flip-flop
  insides the circuit using Controllability
  Analysis Method
• Ordering the flip-flops with respect to their
  P(0)
• Most biased flip-flops will be replaced with
  Enhanced Scan FF first
• Running ATPG using Synopsis TetraMax

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Results (s13207)
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Results (s9234)
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Results (s5378)
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1
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Results (s1423)
2
1
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Results (s15850)
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3
2
1
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Interchange Procedure
Calculate FCN (N0, 1, 220) Interchange_times0
Delta_Slope_allowable_value -0.03
Interchange_allowable_times 30 While
(minimum Delta_SlopeN lt Delta_Slope_allowable_va
lue) (Interchange_times lt Interchange_allowab
le_times) Find M, where Delta_SlopeM
minimum Delta_SlopeN Exchange Flip-flops
in group GM with flip-flops in group GM-1
Update FCM-1 Interchange_times
Interchange_times 1
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Results (s5378)
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Results (s1423)
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Results (s15850)
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Conclusion

• Partial Enhanced Scan design achieves high TDF
  coverage reduces DFT cost
• Both Dual Enhanced Scan Flip-flop and Enhanced
  DTSFF support Enhanced Scan with slow enable
  signals
• Controllability Analysis is used for scan unit
  selection (prescreening)
• Interchange Procedure further refines scan-unit
  selection

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Questions?