Digital Logic I

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Digital Logic I
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Announcements

• Purchase and register your PRS unit
• Will use this Thursday

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Outline

• Transistors
• Logic Gates
• NOT, OR, NOR, AND, NAND
• DeMorgan's Law
• Larger Gates
• Combinational Logic Circuits
• Decoder, MUX, Full Adder, PLA,
• Logical Completeness
• Basic Storage Elements
• R-S Latch, Gated D latch, Register

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It's all about switching...

• Action at a distance
• Come here, Watson! I need you!
• Tubes
• Transistors
• CMOS FET

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Action at a Distance
Distance
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Relay Logic

•   x0001   x0002       Y0001
• --- -----/---------( )-----
•                               
•                               
•   x0001                   Y002
• --- --01000 TON T012--( )--
•                               
•                               
•                           R001
• --D0140    0001--------( )--
•                               
•   R001                   Y004 
• -- ---------------------( )--
•                               
• -END-------------------------

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Reach Out and Touch Someone

• Problem How do you talk to someone who is very
  far away?

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So to save money...
N

P
N
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So to save money...
N

P
N
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MOS FET
Source
Drain
Gate
-
-
-
P-type substrate
N-type
Channel
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(No Transcript)
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N-Type MOS
Source
Gate
Drain
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P-Type MOS
Source
Gate
Drain
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(No Transcript)
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V
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V
V
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Inverter (Not)
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NOR
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OR
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NAND
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AND
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DeMorgan's Law

• In C syntax
• (AB) AB
• (AB) AB

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Larger gates
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Combinational Logic

• Combination of AND, OR, NOT (plus NAND NOR)
• Same inputs always produce same output
• Analogous to cheap bicycle lock

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Problem

• You have an n bit binary number which signifies
  which mole is selected. How do we physically
  connect to the desired mole?

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Decoder
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Problem

• You have s signals and you want to use the
  logical value on one of them determined by a set
  of n control wires

m
n
out
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Multiplexor
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Problem

• No one will buy your new computer design unless
  it can do at least some math, say, like adding!

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Full Adder
A
B
OUT
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Full Adder
A
B
Carry OUT
OUT
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Full Adder
A
B
Carry IN
Carry OUT
OUT
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Truth
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Truth
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Full Adder
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PLA

• Given a truth table we can implement it using
  output using a series of AND gates followed by a
  series of OR gates
• We need 2n AND gates where n is the number of
  inputs
• How many rows does the table have?
• We need one OR gate for each output
• General purpose Programmable Logic Array devices
  exist for this purpose

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Interconnections
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Combinational vs. Sequential Logic

• Combinational
• Combination of AND, OR, NOT (plus NAND NOR)
• Same inputs always produce same output
• Analogous to cheap bicycle lock
• Sequential
• Requires storage elements
• Output depends on inputs plus state
• Analogous to a RLR combination lock
• Used to build memory state machines

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Basic Storage
Consider
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RS Latch
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What happens if both inputs to RS latch are 0?
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Gated D Latch

• The RS Latch can be set or cleared but what if we
  want to record the value on the input?

Value of Interest
Stored Value
Control
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Gated D Latch
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Register

• Basically an array of Gated D latches!

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Questions
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(No Transcript)
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NOR
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NAND
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RS Latch
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Gated D Latch