ECE U322 Digital Logic Design

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ECE U322Digital Logic Design
Oct. 5 2005

• Lectures 13
• Multiplexers
• Binary Adders
• Binary Subtractors
• Reading Marcovitz 5.2
• Midterm Exam on Thursday next week, October 13!

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Anouncements

• Homework 3 is due this Thursday, Oct. 6.
• There is no Homework due Oct. 13.
• I will post a practice exam on Thursday.
• You do NOT need to hand it in.
• We will go through the solutions on Wednesday,
  October 12 in class.
• There WILL be homework due Oct. 20!

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First Midterm Oct. 13 in class

• Exam is closed book, closed notes, no
  electronics no calculators, etc.
• I will provide useful tables

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• Half Adder
• Combinational circuit the performs the addition
  of two bits.
• Full Adder
• Combination circuit that performs the addition of
  three bits (two bits and a carry in).

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Half Adder
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Full Adder
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Sum is a 3 input XOR

• A B Cin A xor B A xor B xor Cin

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Parallel Binary Adder

• Produces the arithmetic sum of two binary numbers
  using only combinational logic.
• n full adders in parallel.
• Remember, a full adder adds single bits
• All input bits are applied simultaneously.
• Carry bits ripple through adder as they are
  calculated.

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Binary Ripple Carry Adder

• The full adders are connected in cascade, with
  the carry output from one full adder connected to
  the carry input of the next-higher-order full
  adder.

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• Example
• Given inputs A 1011 and B 0011.

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Carry Co is always 0?

• I could make the rightmost adder a half adder
• C0 is 0 only adding A0 and B0
• Saves hardware.
• I do not want to do this
• Subtraction will use C0.
• May use C0 to build larger adders.

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2s Complement

• To get the negative of a number
• Invert ALL of the bits in the number.
• Add 1.

00000101 5
11111010 invert all bits
11111011 Add 1
11111011 -5
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2s Complement Addition

• Just Add Gives the correct results

00000111 7

11111011 -5
0
1
0
0
0
0
0
0
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2s Complement Subtraction

• X-Y
• X (-Y)
• Doesnt matter whether 2nd number is positive or
  negative
• To implement 2s complement subtraction
• Get negative of 2nd number Then, Add

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Subtraction with Signed Numbers
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Subtraction with Signed Numbers
Discard carry
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How to build a binary subtractor

• (A - B) A (2s complement of B)
• Invert B inputs
• Add 1 to A - B
• Can set carry in to 1 to accomplish this

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Binary subtractor

• Binary subtractor using full adders
• S A B A (2complement of B)

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Binary Adder/Subtractor

• Binary Adder and Binary Subtractor are very
  similar
• Dont build two separate units -- build one
  adder/subtractor
• S input tells me if I want to subtract
• S 0 Add A B
• S 1 Subtract

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A 4-Bit Adder-Subtractor
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4-bit Binary Adder/Subtractor

• Feed S directly to Carry_in
• if S 0, Add, Carry_in
• if S 1, Subtract, Carry_in
• Dont need invert and mux to calculate B input
• if S 0 feed in B directly
• if S 0 feed in B

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If S 1, Invert B

• Can do this on each bit using an XOR gate

B_in
B
S
0
0
0
1
1
0
1
0
1
0
1
1
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Adder- Subtractor Circuit
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Carryout and Overflow

• If we start with 2 n-bit numbers and the sum
  occupies more than n bits, an overflow occurs.
• Computers can hold a fixed number of bits.
  Results that exceeds this fixed number will not
  be correctly represented.

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Carryout and Overflow

• Carry out means that you have overflowed the
  UNSIGNED range.
• four bit numbers, range is ________
• Overflow means that you have overflowed the
  SIGNED range.
• four bit numbers, range is __________

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Signed numbers

• Overflow cannot occur for addition when one
  number is positive and the other is negative.
• Overflow may occur only when adding numbers that
  are both positive or both negative.
• overflow if adding two posititve numbers and
  result is negative, or
• adding two negative numbers and result is positive

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Carry out and Overflow

• 5, 7, -5, -7 represented as 4 bit, signed
  values
• 0101 0111, 1011, 1001
• 5 7
• 0101
• 0111
• __overflow, __ carry out

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Overflow and Carryout

• 5 -7
• 1
• 0101
• 1001
• 1110 __overflow, __ carryout

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Carry out and overflow

• - 5 7
• 111
• 1011
• 0111
• 10010 ___overflow, __carry out

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Overflow and Carry Out

• -5 -7
• 11
• 1011
• 1001
• 10100 __overflow, __ carry out

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An n-bit adder
Generalize the four bit adder to n bits
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An 8-bit adder built from 4 bit adders
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Carry Lookahead Adder

• Slowest part of ripple carry adder is computation
  of last carry
• want to speed this up
• Reduced delay at the price of more complex
  hardware area, speed tradeoff
• Redesign the carry logic so that it is two-levels
  of logic
• more complex than ripple carry chain
• faster

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Carry-lookahead adder

• First compute carry propagate, generate
• Pi ai bi
• Gi ai bi
• Compute sum and carry from P and G
• si ci XOR Pi XOR Gi
• ci1 Gi Pici

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Carry-lookahead expansion

• Can recursively expand carry formula
• ci1 Gi Pi(Gi-1 Pi-1ci-1)
• ci1 Gi PiGi-1 PiPi-1 (Gi-2 Pi-1ci-2)
• Expanded formula does not depend on intermediate
  carries.
• Allows carry for each bit to be computed
  independently.

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Depth-4 carry-lookahead
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• Build a 16-bit adder using 4-bit carry lookahead
  adders