Quiz 3 Review

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Quiz 3 Review

• Find revised class slides at
• http//www.rpi.edu/sawyes/Courses.html

2
Review Topics

• Astable Multivibrator (555)
• Combinational Logic
• Sequential Logic
• Switching Circuits (transistors)
• Comparators Schmitt Triggers

3
Important in this Review

• Know how to use the Crib Sheet
• Familiarize yourself with equations
• Thoroughly understand truth tables, timing
  diagrams, and how to draw and read output traces
  from PSpice
• Remember to do practice problems from
• http//hibp.ecse.rpi.edu/connor/education/EIQuiz
  Info.htmlQuiz3
• These review slides can be found at
• www.rpi.edu/sawyes/Courses.html

4
Astable Multivibrator (555)

• Be able to apply the equations for T1, T2 and
  frequency given R1, R2 and C.
• Be able to find values of R1, R2 or C given T1,
  T2 or frequency.
• Given a plot of the output of an astable
  multivibrator circuit, be able to determine T1,
  T2, T and frequency. Also be able to use these to
  find values for R1, R2 and/or C.
• Be able to find the equation for duty cycle and
  understand how it is related to the resistor
  values.
• Be able to recognize the output plots for pins
  3(output), 2(trigger), 6(threshold) and
  7(discharge). Also know the pin names.
• Be able to find the decay constant for the charge
  and discharge cycles of the capacitor in the
  astable miode circuit.

5
Crib Sheet Highlighter
6
Understanding the Astable Mode Circuit

• 555-Timers, like op-amps can be configured in
  different ways to create different circuits. We
  will now look into how this one creates a train
  of equal pulses, as shown at the output.

7
555 Timer

• At the beginning of the cycle, C1 is charged
  through resistors R1 and R2. The charging time
  constant is
• The voltage reaches (2/3)Vcc in a time

8
555 Timer

• When the voltage on the capacitor reaches
  (2/3)Vcc, a switch (the transistor) is closed
  (grounded) at pin 7.
• The capacitor is discharged to (1/3)Vcc through
  R2 to ground, at which time the switch is opened
  and the cycle starts over.

9
Astable Multivibrator

• The multivibrator above was built with the 555
  timer chip shown. In the diagram, Vs is the
  source voltage, Vc is the voltage across the
  capacitor C1 and VD is the voltage at the
  discharge pin of the timer. You are given the
  following component values
• R14.7k ohms
• R26.8k ohms
• C10.68µF
• Vs (Vcc)6V

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Astable Multivibrator

• Calculate the on time and off time of the
  multivibrator.
• Calculate the frequency of the multivibrator.
• Calculate the duty cycle of the multivibrator.
• In theory, what are the maximum and minimum
  voltage across the capacitor, Vc?

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Astable Multivibrator
5) Find an expression for the voltage at pin 7
(when pin 7 is not grounded) in terms of the
voltage across the capacitor, Vc, the source
voltage, Vs, and the two resistors R1 and R2. Do
not substitute values. Recall Schmitt Trigger
6) Use the equation in 5) to find the
maximum and minimum voltage at pin 7 when the
transistor is open. 7) Label the plot.
VVpin7
VrefVc
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Astable Multivibrator
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Combinational Logic

• Be able to identify the following logic gates
  AND, OR, NAND, NOR, XOR (EOR), XNOR, NOT.
• Know the truth tables for the following logic
  gates with up to four inputs AND, OR, NAND, NOR,
  XOR (EOR), XNOR, NOT.
• Be able to draw a truth table or timing diagram
  for a digital circuit.
• Be able to recognize or sketch the output timing
  diagram of a digital circuit.
• Know the PSpice conventions for naming the input
  and output pins of logic gates.
• Be able to describe the overall or relative
  function of a digital circuit.
• Be able to simplify simple Boolean algebra
  expressions.
• Be able to name a NAND gate or other circuit as
  equivalent to one of the logic gates above.

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Crib Sheet Highlighter
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Combinational Logic
U2AA
U2AY
U3AA
U4AY
DSTM21
U3AY
U2AA DSTM21 U3AA U2AY U3AY U4AY
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Combinational Logic

• Fill in the truth table from the above circuit
• What gate does this circuit represent?
• XOR

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Sequential Logic

• Be able to identify or sketch the output of a
  counter or a J-K flip-flop.
• Be able to draw a truth table for a J-K
  flip-flop.
• Understand how many bits each counter has, what
  behavior each bit exhibits, and how to string
  counters together to count higher.
• Know what the function of the clock is in the
  flip flop and counter.
• Understand the effect of clock pulse timing can
  have on flip-flop outcome.
• Understand how to string flip-flops together to
  make a counter.
• Be able to recognize or sketch the output timing
  diagram of a sequential logic circuit given the
  clock signal.

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Crib Sheet Highlighter
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Sequential Logic Devices

• In a sequential logic device, the timing or
  sequencing of the input signals is important.
  Devices in this class include flip-flops and
  counters.
• Positive edge-triggered devices respond to a
  low-to-high (0 to 1) transition, and negative
  edge-triggered devices respond to a high-to-low
  (1 to 0) transition.

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Binary Counters

• Binary Counters do exactly what it sounds like
  they should. They count in binary.
• Binary numbers are comprised of only 0s and 1s.

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Typical Output for Binary Counter

• Note how the Q outputs form 4 bit numbers

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Binary Counters are made with Flip Flops
0
0
1
1
0
0
1
Each flip flop corresponds to one bit in the
counter. Hence, this is a four-bit counter. J and
K are set to toggle (1) at clock edge
(triggered) Output of one is input clock to the
next
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Sequential Logic
U5ACLK (flip flop clock)
DSTM21 (counter clock)
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Sequential Logic
Falling edge
Falling edge
Falling edge
Falling edge
1
0
J1
1
0
K1
Q1
J2
K2
Q2
All changes at the falling edge of the clock so..
J1 is QA which toggles at each falling edge K1 is
also QA which toggles at each falling edge
Q1 is the output of the JK from inputs J1 and K1
so if 1 and 1 toggle if 0 and 0 stay on DSTM1 or
U5ACLK
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Sequential Logic
Falling edge
Falling edge
Falling edge
J1
K1
Q1
1
1
0
J2
0
0
K2
1
Q2
All changes at the falling edge of the clock so..
Q2 is the output of the JK from inputs J2 and K2
so if 1 and 1 toggle if 0 and 0 stay, if J2
is 1 and K2 is 0 Q21 (Q2_bar0) If J2 is 0 and
K2 is 1 Q20 (Q2_bar1)
J2 is QB which toggles at every other falling
edge (1 cycle behind QA) K2 is also QC which
toggles every four falling edges (2 cycles behind
QA)
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Sequential Logic
1

• If the output of the output of the two flip flops
  (Q1, Q1_bar, Q2, Q2_bar) represents a four digit
  binary number, what decimal number does it
  represent at the end of the time frame specified?

• To what value does the counter count in the time
  frame indicated? Rephrasing question

Q11 Q1_bar0 Q20 Q2_bar1 10019
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Switching Circuits

• Know how to model a transistor as a switch.
• Know how to draw the "diode" model of a
  transistor.
• Be able to define and identify the base, emitter
  and collector of a transistor.
• Be able to recognize, identify, and sketch traces
  from a simple circuit involving transistors,
  comparators, Schmitt triggers and/or relays.
• Be able to redraw a simple circuit using the
  switch or diode model of a transistor.
• Be able to redraw and analyze a circuit when a
  relay is in either position.
• Be able to calculate voltages at different points
  in a simple switching circuit.
• Be able to identify a combinational logic gate
  given a simple transistor model.

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Crib Sheet Highlighter
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Simplified Switching CircuitsModel using diodes
and resistors
Open circuit, short circuit
Diode transistor model
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Switching Circuits

• Redraw the circuit in the above figure with the
  transistors modeled as switches and diodes.

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Switching Circuits
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Switching Circuits

• Fill in the following table of Vout as a function
  of Va and Vb based on the model above.
• What kind of gate is it? NOR

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Schmitt Triggers and Comparators

• Understand the difference in function between a
  comparator and a Schmitt trigger in the presence
  of noise.
• Be able to sketch the output from a comparator
  and Schmitt trigger from a given input.
• Be able to identify the point at which a Schmitt
  trigger will switch when voltage is increasing
  and decreasing.
• Be able to define hysteresis.
• Understand the relationship between hysteresis
  and when a Schmitt trigger switches.
• Understand the model of a Schmitt trigger
  explained in class and in your book. Be able to
  find the switching thresholds and hysteresis of a
  circuit using this model.

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Schmitt Triggers and Comparators

• Be able to determine hysteresis of a Schmitt
  trigger from a plot of Vin vs. Vout and/or Vout
  vs. time.
• Understand what saturation of an op-amp is and
  how it relates to the function of comparators and
  Schmitt triggers.
• Be able to recognize, identify, and sketch traces
  from comparators and Schmitt triggers.
• Be able to calculate voltages at different points
  in a switching circuit with comparators and
  Schmitt triggers.

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Crib Sheet Highlighter
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Comparators and Schmitt Triggers

• In this section we will use op-amps to create
  binary signals.
• Comparators are the simplest way to create a
  binary signal with an op-amp. They take
  advantage of the very high gain of the chip to
  force it to saturate either high (VS) or low
  (VS-) creating two (binary) states.
• Schmitt Triggers are a modified version of a
  comparator which uses a voltage divider to
  improve the performance of the comparator in the
  presence of noise.

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Comparator Response to Noisy Inputs
Note how the output swings between high and low.
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• Schmitt Trigger Model
• One very effective way of improving the
  performance of the comparator is by introducing
  positive feedback. Positive feedback can
  increase the switching speed of the comparator
  and provide noise immunity at the same time.
• The voltage range over which the signal does not
  switch is called the hysteresis (In this case,
  h2d)

Can you explain how this works?
39

• In effect, the Schmitt trigger provides a noise
  rejection range equal to Vsat R2 / (R2 R1)
  within which the comparator cannot switch.
• Thus if the noise amplitude is contained within
  this range, the Schmitt trigger will prevent
  multiple triggering.

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Schmitt Triggers and Comparators
Voltage Divider
Feedback

• Identify A and B on the plots (next slide)
• Label A and B, what are they?

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Schmitt Triggers and Comparators
42
Schmitt Triggers and Comparators

• What is the saturation range of the op-amp (in
  both circuits)?
• If R2 is 10K ohms, then what does R3 have to be
  in circuit B to give a hysteresis of 4 Volts?

Saturation Range 14.6 to -14.6 V
dVsatR3/(R3R2) 2V14.6VR3/(R310k) R31587
ohms
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Quiz TOMORROW

• DCC-308 600 p.m.
• My office hours Thursday 130 p.m.-230 p.m. or
  by appointment
• No class next Wednesday
• Pickup Lecture on Diode review and Project 4
• 2 more lectures left!
• Have a great Thanksgiving break!