Screening for Counterfeit Electronics Components

1
Screening for Counterfeit Electronics Components

• Glenn Robertson
• Stephen Schoppe
• Process Sciences, Inc.
• Leander, Texas
• 512.259.7070
• www.process-sciences.com

2
Outline

• Introduction
• Authentication Test Procedures
• Examples
• Conclusion

3
Introduction

• Nature and Scope of Problem
• A growing (and high-profit) industry
• Related to -
• Globalization
• Product Cost
• High Demand/Scarcity
• Obsolescence
• Spotty laws and enforcement

4
Introduction

• Nature and Scope of Problem
• Includes all types of products, such as
• Pharmaceuticals
• Auto parts
• Phones/batteries
• Golf Clubs
• Power Tools
• Elevators
• Electronic components
• And many more

5
Introduction

• Nature and Scope of Problem
• What are counterfeit electronics?
• Misrepresented parts
• Wrong parts (altered P/N)
• Wrong date code
• Consumer grade remarked as military grade
• Reclaimed parts
• Manufacturing defects/surplus production
• Reverse Engineered copies

6
Introduction

• Risk Reduction by Supply Chain Management
• Careful supply chain management will always be
  the first line of defense
• Purchase from franchised distributors
• Screening inspection (Authentication) for
  high-risk components
• Parts from Grey Market distributors
• High Value/Scarce
• Obsolete

7
Introduction

• Authentication Procedure(s) Developed for
  Screening High-Risk Components
• Non-Destructive
• Destructive

8

• Authentication Procedures

9
Authentication Procedures

• Non-Destructive
• Component Database Comparison
• Visual Testing
• X-ray Inspection
• X-ray Fluorescence (Lead Finish, RoHS screen)
• Electrical Testing
• Destructive
• Chemical Decapsulation
• Mechanical Delidding

10
Component Information Database

• Information Sources
• Golden Part
• Manufacturers Data Sheets
• OCMs
• Distributors
• Other sources (e.g., customer, PSI files)
• Date Code histories
• Company histories
• Chip suppliers
• Mergers, name changes, plant closings/relocations
• Prior screening history at PSI

11
Visual Testing

• Verify Correct P/N
• Verify Date Code Against Database
• Compare Font and Symbology Against Golden Part
  if Available

12
Visual Testing

• Inspect package for
• Blacktopping
• Sanding Scratches
• Discrepancies in Surface Texture

13
Visual Testing

• Marking Permanency Test (MPT)
• Mineral Spirits (JEDEC JESD22-B107C)
• MEK, Acetone, Alcohol
• Degradation of Markings
• Change in Surface Texture
• Partial Removal of Coating

14
Visual Testing

• Inspect Lead Condition
• Surface Appearance
• Check Straightness and Coplanarity
• Evaluate Solderability

15
X-ray Inspection

• Chip size/count
• Wire bond count/pitch
• Flip chip bump count/pitch
• No need to open package

16
X-ray Inspection
17
XRF Testing

• Provides rapid semi-quantitative elemental
  analysis
• Typically used for
• RoHS compliance screening
• Verify lead finish
• Verify Pb presence where required

18
Electrical Testing

• Curve Tracer
• Used primarily for discretes
• Generates a characteristic curve for DUT
• Plots voltage or current response vs. voltage
  or current stimulus 
• Detects shorts, opens, high leakage current

19
Chemical Decapsulation

• Used on epoxy packages
• Acid etching most common

20
Mechanical Delidding

• Metal or ceramic packages
• Diamond saw or Dremel
• Lid pry-off

21

• Verification Examples

22
Lambda Discrete TO Transistor

• 1 Gold part, 2 to be tested
• Passed visual inspection and MPT
• Si Chip Visible by X-ray Inspection
• Bond wires not visible

23
Lambda Discrete TO Transistor

• Screening by Curve Tracer
• One Faulty Component Quickly Identified

Base to Emitter
Emitter to Collector
24
Lambda Discrete TO Transistor

• De-lidding Results
• No P/N or other markings on chips
• Similar surface color and circuit artwork
• Conclusion both samples genuine, with one
  electrical failure

25
Altera Ceramic DIP

• Two Packages to be tested
• Visual Inspection
• No evidence of tampering
• Markings passed permanency test

26
Altera Ceramic DIP

• Delidding to Examine Silicon Chip
• Surface of chips virtually identical
• Close inspection shows WaferScale on chip 1 vs.
  D on chip 2
• Probably from different fab lines or different
  revisions

Chip 1 Close up
Chip 2 Close up
Full Chip
27
Maxim 8-Pin DIP

• One package to be tested
• Visual Inspection
• Markings Passed Permanency Testing
• Non-uniform Leads, Evidence of Re-tinning

28
Maxim 8-Pin DIP

• Decapping Results
• Manufacturer Logo, Date Code, P/N Identified
• chip date code 1990, and chip ID 1016
• Corresponds to earlier Linear Tech P/N LT1016
• Component surface has been remarked to a MAX913,
  which is Maxims improved replacement for Linear
  Techs LT1016

29
Philips 68 Pin PLCC

• Two Packages to be Tested
• Visual Inspection
• Same markings on each component
• Surface texture removed by solvent
• Parts were black-topped and remarked

Component Top As-Received
Component Top After SolventResistance Test
30
Philips 68 Pin PLCC

• Decapping Results
• Same marking on both chips
• Corresponds with portion of external marking
• Purpose of remarking possibly to alter date code
  or P/N variant

31
Xicor 8-Pin DIP

• Two Packages to be Tested
• Visual Inspection
• All markings removed by MPT
• Textured surface also removed

Component Top As Received
Component Top After MPT Solvent Test
32
Xicor 8-Pin DIP

• Decapping Results
• Same marking on both chips
• Corresponds with external P/N
• Purpose of remarking possibly to alter date code
  or P/N variant

Overall Photo of Chip
Chip Markings Close-Up
33
Samsung 48-pin TSOP

• Two Packages to be Tested
• 64M x 8 Bit NAND Flash Memory
• Visual Inspection
• Laser-marked
• No Evidence of Tampering

Component Top As Received
34
Samsung 48-pin TSOP

• Decapping Results
• Same marking on both chips
• P/N K9F5608U0A (as marked on chip) corresponds to
  32M x 8 Bit NAND flash Memory
• Components have been remarked as 64M NAND

Chip Markings Close-Up
Overall Photo of Chip
35
Actel Ceramic PGA

• One Package to be Tested
• Passed MPT, No Signs of Tampering

Top component markings
Bottom component markings
36
Actel Ceramic PGA

• Alphanumeric and Mfg Logo Located onChip Surface
• 21225 on chip matches package marking
• Many Actel chips produced by TI in 80s
• Actel acquired operations from TI in 1995
• No indication of counterfeit

Top Edge Close-Up
Upper Right Corner Close-Up
Chip Surface
37
Micro Power Systems 48-pin SOIC

• Four Packages to be Tested
• Two each of date codes 9812 and 9751
• Passed MPT, No Signs of Tampering

Date 9812 Bottom Markings
Date 9812 Top Markings
Date 9751 Top Markings
Date 9751 Bottom Markings
38
Micro Power Systems 48-pin SOIC

• X-ray Inspection Results
• Lead frames identical
• All bond wires intact

X-ray Image - 9751 date code
X-ray Image - 9812 date code
39
Micro Power Systems 48-pin SOIC

• Decapping Results
• Identical markings on all components

Chip Surface Upper Right Corner
Chip Surface Lower Right Corner
40
Micro Power Systems 48-pin SOIC

• Decapping Results Close-up
• Marked with Exar Logo
• Date Code 1996
• Exar acquired Micro Power Systems(M Logo) in
  1994
• Markings consistent with authentic parts

Markings Close-up Lower Right Corner
41
Motorola Microwave Transistor

• 1 Gold part, 2 to be tested
• Packages and markings identical

42
Motorola Microwave Transistor

• De-lidded Part Results
• Package 3 chip has MOT and logo
• Packages 1 and 2 are counterfeit

Package 1
Package 3
Package 2
43
Conclusions

• Component Verification is Essentialto Supply
  Chain Management
• Many Non-Destructive and Destructive Tests
  Available
• Balance Verification Plan Against Assessment of
  Risk

44
Thank You!
Glenn Robertson glennr_at_process-sciences.com
Stephen Schoppe sms_at_process-sciences.com