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Assertion based Verification in TLM

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The design productivity, facilitated by EDA tool improvements, grows only 21% per year ... Different levels of abstraction. Different assertion languages: PSL, ... – PowerPoint PPT presentation

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Title: Assertion based Verification in TLM


1
Assertion based Verification in TLM
  • Amirali Ghofrani
  • Negin Javaheri

East West Design and Test Symposium09
2
Outline
  • Verification
  • Assertions
  • The road map
  • SystemC Assertions
  • TLM Assertions
  • Simple Assertions
  • Static Assertions
  • Dynamic Assertions
  • Next steps!
  • Summary

3
Why to do verification?
  • Number of transistors on a chip increases
    approximately 58 per year, according to Moore's
    Law
  • The design productivity, facilitated by EDA tool
    improvements, grows only 21 per year
  • Functional errors form 43 of all errors in the
    designs
  • Undetected faults costs so much for the companies
    in terms of redoing the chip, replacing the
    faulty device, and the most important of all
    regaining customers confidence
  • statistics were extracted from SIA road map and
    one of synopsis surveys

4
Verification Categorization?
  • Can be divided from many point of views
  • Levels of abstraction
  • Gate Level
  • RTL
  • TLM
  • Methods
  • Formal
  • Simulation based
  • Hybrid!
  • Assertion based

5
Assertion
  • Assertion is the characterization of a designs
    behavior
  • Advantages
  • Increased observability
  • Faster debugging
  • Reusability
  • Similar designs
  • Different levels of abstraction
  • Different assertion languages PSL, OVL, SVA,

6
The road map
SystemC Assertions
7
SystemC Assertions
  • Why SystemC assertions
  • SystemC was chosen as the primary language to
    describe the new higher levels of abstraction
  • Unlike HDLs, no specific assertion set was
    provided for SystemC
  • OVL like Assertions defined in SystemC
  • Same Functionality
  • Same arguments
  • Same parameters
  • Same coverage calculations
  • Useful for
  • RTL and mixed TLM-RTL designs
  • TLM computational modules

8
TLM Assertions
  • Uses OSCI TLM1.0 library
  • Provides verifiable communicational channels
  • Implemented as SystemC functions within TLM1.0
    library
  • Can be called whenever the desired channel is
    accessible
  • Categorized into 3 groups
  • Simple
  • Static
  • Dynamic

9
Simple Assertions
Assert_nbput() has been fired.
  • Some examples
  • Assert_full
  • Assert_nbput
  • Assert_blocking

Assert_blocking() has been fired.
Run!!!
10
Static Assertions
  • Static Parameters
  • Start time
  • End time
  • Number of transactions
  • Limit on the number of FIFO blocks

11
Static Assertions- Cont.
  • Examples
  • Assert_Overflow(limit)
  • Assert_num_nbput_time(stTime, EndTime, limit)

Putting three data into the channel
Putting one data into the channel
Assert_overflow(3) has been fired.
Run!!!
Assert_nbput_limit_time(30000,90000,2) has been
fired.
12
Dynamic Assertions
  • Dynamic Parameters
  • Getting some signal as input port
  • Port binding is needed
  • Static Parameters
  • Like before!
  • Examples
  • Assert_no_same_data_nbput

13
Dynamic Assertions- Cont.
Writing the desired value in parameter
Run!!!
Specifying the desired dynamic assertion
Binding and passing the appropriate port to the
input parameter of assertion
14
Can we live happily ever after?
  • NO!
  • TLM2.0 has arrived!
  • Functional coverage
  • Add more assertions and complete the set!

15
Summary
  • Verification of TLM components
  • TLM assertions for Communicational
  • SystemC assertions for Computational
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