Virgo Online Architecture based on PC server processors

1
Virgo Online Architecture based on PC server
processors

• T.Bouedo,S.Cap,N.Letentre,A.Masserot,B.Mours,
• J.M.Nappa,E.Pacaud

2
Virgo Online Architecture

• Guideline
• 2 main controls ISYS control and ITF control
• ISYS control and ITF control are running on
  different machines
• ITF Longitudinal and Angular running on different
  machines
• ? 3 machines for the full control ISYS, zITF
  and tx,tyITF
• All the controls could have access to all the ITF
  errors signals
• Bi-directional connections for TOLM links
• Mux/Demux characteristics
• 8 Inputs/Outputs Multiplexer/Demultiplexer
• Store and Forward policy
• Only 2 Mux/Demux could be chained
• A broadcast facility is available
• Note VIR-022B-07 for more details
• Locking group locking frequency 10KHz
• Alignment group alignment frequency 1-2KHz

3
Suspension IB,MC,PR,BS,NE,NI,WE,WI,SR,OB
Suspension Control
To/From P-GIPC_XX Acc/Acc
DAQ Sa
DAQ Sc
To/From ITFCtrl_XX /ztx,ty
z,y,z,tx,ty,tz
DAQ SaSc
P-GIPC
To/From P-GIPC_PR Acc/Acc
To/From P-GIPC_SR Acc/Acc
VME XX Camera
To/From P-GIPC_BS Acc/Acc
To/From P-GIPC_NE Acc/Acc
To/From P-GIPC_NI Acc/Acc
To/From P-GIPC_WE Acc/Acc
To/From P-GIPC_WI Acc/Acc
4
ISYS Control
Laser Lab
DAQ Room
Mode Cleaner Building
ISYS Sensing
Suspension Control
Suspension Control
Linux VME CPU
ISYS Control
DSP Sc_MC
RT PC Gx -DAQ
Mux/Demux
ADC PSD
VME IB Camera
VME MC Camera
ISYS Sensing
To/From ITFCtrl SSFSTrigtx,ty/
ADC Coil Moni,QT
5
Detection Laboratory
DAQ and Detection Slow Control
To/From QA_DL /Q1pQ5
LoSrVbQ1Pos,Q5Pos
RT PC DAQ DET Slow,Qa
4 VME Pisa DAC
ITF Sensing
To/From ITFCtrl_DL B1,B1p B1_2f,B1sB5,B5_2fBPo
s
6
ITF controls z and tx,ty
ITF Sensing
To/From ITFCtrl_LL B2,B2_3f,RFC/
To/From QA_DL /Q1pQ5
To/From ITFCtrl_NE ztx,ty/B7Q7B7Pos
To/From QA_LL /Q2
To/From ITFCtrl_WE ztx,ty/B8Q8B8Pos
To/From ITFCtrl_DL /B1,B1p B1_2f,B1sB5,B5_2fBP
os
ITF Computing
SSFSTrigtx,ty
tx,ty
zSSFSTrig
tx,ty
ITF Driving
z
To/From ITFCtrl_BS ztx,ty/
To/From ITFCtrl_SR ztx,ty/
To/From ITFCtrl_NI ztx,ty/
To/From ITFCtrl_OB ztx,ty/
To/From ITFCtrl_WI ztx,ty/
To/From ITFCtrl_PR ztx,ty/
7
ITF controls z and tx,ty load repartition
ITF Sensing
To/From QA_DL /Q1pQ5
To/From ITFCtrl_LL B2,B2_3f,RFC/
To/From QA_LL /Q2
To/From ITFCtrl_NE ztx,ty/B7Q7B7Pos
To/From ITFCtrl_WE ztx,ty/B8Q8B8Pos
To/From ITFCtrl_PR ztx,ty/
ITF Computing
SSFSTrigtx,ty
tx,ty
zSSFSTrig
tx,ty
ITF Driving
z
To/From ITFCtrl_DL /B1,B1p B1_2f,B1sB5,B5_2fBP
os
To/From ITFCtrl_BS ztx,ty/
To/From ITFCtrl_NI ztx,ty/
To/From ITFCtrl_OB ztx,ty/
To/From ITFCtrl_WI ztx,ty/
To/From ITFCtrl_SR ztx,ty/
8
Virgo Architecture - LAPP boards
9
I/O Bandwidth comparison ITF control

• PC Transtec Dual Core Opteron
• 2 cores _at_ 2GHz
• I/O bandwidth
• PCI bus 64bits _at_ 66MHz
• Input 500MBytes/s
• Output 112MBytes/s
• Data transfer
• Errors signals to read via TOLM
• deltaL signals to send via TOLM
• DAQ data to send via Ethernet

• ADSP211160N SHARC DSP
• 6 cores _at_ 100MHz
• I/O bandwidth
• DSP links connected to a TOLM
• Input 2 links _at_ 100MBytes/s
• Output 2 links _at_ 100MBytes/s
• Data transfer
• Errors signals to read via TOLM
• deltaL signals to send via TOLM
• DAQ data to send via TOLM

10
I/O Bandwidth comparison ITF control

• I/O Estimation for z and tx,ty controls running
  on 2 different machines

• PC
• Interrupt latency (3us) Output (1.14us)
  Interrupt latency distribution width (7us) -
  11.2us 80kHz
• DSP
• 6.16us/2 9.04us 0.64us - 13.4 70kHz
• ? Today PC and DSPs I/O performances gives the
  same limitation for the frequency loop