A PRAM and NAND Flash Hybrid Architecture for HighPerformance Embedded Storage Subsystems

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A PRAM and NAND Flash Hybrid Architecture for
High-Performance Embedded Storage Subsystems

• Jin Kyu Kim, Samsung Electronics
• Hyung Gyu Lee, Samsung Electronics
• Shinho Choi, Samsung Electronics
• Kyoung Il Bahng, Samsung Electronics

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Why Hybrid Approach ?

Gasoline Engine - Gasoline price is high -
Pollution - Fuel Efficiency depends on traffic
Good for high way -Bad for heavy traffic
Fuel capacity is large
Electronic Motor Electricity price is
reasonable No pollution Good fuel
efficiency - Fuel capacity is very limited
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Era of Hybrid Approach
NAND Flash - Short life span - W Performance
depends on access Good for large sequential
access -Bad for small random access - No
support for byte access Very high density
NVRAM Long life span Good performance
Support for byte access - Low density
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Characteristics of NVRAM(PRAM)

• Flash memory device
• Erase before program
• Different granularity on erase and program
  operations
• Limited life time
• High Density (NAND)

• NVRAM
• Fast read/write
• Byte operation (random access)
• No erase operation
• Capacity (cost) problem

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Memory Components
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Overall Storage Hierarchy

• User data (Clusters)
• Large size data
• Sequential access pattern
• SectorUnit I/O? Appropriate for NAND property

• Meta data (Clusters)
• Small Size Data
• Frequently updated
• ? Appropriate for PRAM property

Performance Problems !
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Motivations

• In Filesystem Level
• In addition to user data, file system needs to
  manage meta data
• The properties of meta data degrade FTL
  performance
• degrade the
  throughput of file system

Motivation 1

• If store FS metadata into NVRAM instead of NAND
• Decrease overhead for handling Metadata I/O
• Decrease random access I/O to FTL

• In FTL Level
• Performance and Performance stability depends on
  the mapping algorithm
• FTL performance depends on user(Filesystem)?
  Access Pattern

Motivation 2
Page Mapping - High performance - High
resource consumption
Block Mapping - Low performance - Low
resource consumption
Mapping granularity
Fine granularity
Coarse granularity
If implement FTL with NVRAM ? Page Mapping
without large amount of memory memory ? Stable
against random access through fine granularity
Degree of random access
High performance
Low performance
Low
High
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Motivations

• In Filesystem Level
• In addition to user data, file system needs to
  manage meta data
• The properties of meta data degrade FTL
  performance
• degrade the
  throughput of file system

Motivation 1

• If store FS metadata into NVRAM instead of NAND
• Decrease overhead for handling Metadata I/O
• Decrease random access I/O to FTL

• In FTL Level
• Performance and Performance stability depends on
  the mapping algorithm

Motivation 2
Fine grained mapping FTL
Resource
Coarse grained mapping FTL
Fine grained mapping FTL with NVRAM
Performance
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Overall Scheme FSMS, hFTL
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Approach in File System Level FSMS (File System
Metadata Separation)
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File System Metadata Separation Scheme

• Separate File System Meta data FAT,DIR,Log from
  NAND Flash
• Store FS Metadata on PRAM ? Decrease random
  access to FTL
• Only the user data will be stored on NAND flash
• Random Access decrement - FTL overhead decrease
  - Performance and life span of NAND flash
  increase

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Approach in Block Device Level hFTL (PRAMNAND
hybrid storage FTL)
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Need for hFTL
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Implementation of hybrid FTL
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Implementation of hybrid FTL

• PRAM, NAND Layout

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Performance Optimizations - 1

• Filtering between FS and PRAM device
• On the average, only 16 of one metadata block
  is changed

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Performance Optimizations-2

• Functionality of Logical Delete

Remove management Overhead of the space
occupied by deleted file
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Evaluations

• Evaluation Setting
• S3C2413 CPU board
• 1 Channel, 1 NAND device support
• (MLC and SLC)
• 64MB PRAM (KPS1215EZM)
• 1GB MLC NAND (K9G8G08U0M)
• Evaluations
• Comparison Target log block FTL
• Criterion
• Performance
• LLD Layer (Low Level Device driver)
• FTL Layer (Block Device driver)
• File system Layer (TFS4)
• Life span Erase count
• Cost code and data size

NAND
PRAM
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LLD, FTL-Level Evaluation

• LLD (Low Level Device driver)
• Read 4.25MB/s, Write 1.7MB/s

• FTL
• Sequential Read 4.16MB/s (LB-FTL, hFTL Similar)
• Random Read 4.09MB/s (LB-FTL, hFTL Similar)
• Sequential Write 1.62MB/s (LB-FTL, hFTL Similar)
• Random Write

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File System Level Evaluations

• IOzone benchmark for Sequential I/O

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File System Level Evaluations

• IOzone benchmark for Random I/O

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Life Span and Implementation Cost

• Life Span
• Implementation Cost

Required PRAM for 1GB NAND For FSMS 2
MB For hFTL 2.5 MB
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Contribution

• Summary
• Suggest SW scheme for efficient usage of
  NAND/PRAM Hybrid Storage
• FSMS
• hFTL
• Enhance the performance compared to NAND only
  storage
• FSMS, hFTL take effects orthogonally
• For, sequential write, the effects of FSMS is
  larger than that of hFTL
• For, random write, the effects of hFTL is larger
  than that of F?
• hFTLFSMS shows better performance than
  LBFTL by up to 290.
• hFTL shows better performance than
  LBFTLFSMS.
• Future work
• Aggressive optimization using NGNVMs in File
  System Level
• Scalability for large NAND flash storage

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NAND v.s. PRAM
In current technology, its hard to replace NAND
flash with PRAM device. However, its enough to
replace NOR flash