Software Module Introduction and The Hardware Software Interface AMS I2'3'1 Fall 2005

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Software Module Introduction andThe Hardware
Software Interface AMS I-2.3.1 Fall 2005

• Greg Phillips
• greg.phillips_at_rmc.ca
• Royal Military College of Canada
• Electrical and Computer Engineering

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Software module

• hardware-software interface
• operating systems
• a taste of programming hands on
• parallel and distributed systems
• network services
• the Web and related technologies
• electronic mail
• multimedia data types

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Today

• hardware-software interface
• CPU review
• machine and assembly language
• example programs
• operating systems
• a taste of programming hands on
• parallel and distributed systems
• network services
• the Web and related technologies
• electronic mail
• multimedia data types

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Recall fetch, decode, execute

• fetch cycle
• fetch an instruction from memory, store it in an
  instruction register
• decode cycle
• the instruction register is fed into a
  (combinational) decoder to enable the relevant
  instruction logic
• execute cycle
• execute the instruction
• then fetch the next

CPU and CPU state diagrams from Computer
Systems Organization and Architecture by John D.
Carpinelli
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Instruction Sets

• every processor design includes a particular
  instruction set
• the vocabulary of operations that the CPU can
  execute
• each instruction requires corresponding control
  and execution logic in the CPU hardware
• the instruction set architecture includes the
  definition of some registers
• places where the CPU can temporarily store and
  manipulate data
• necessary since the meanings of the instructions
  are often expressed as operations on register
  contents

The Intel 8086 (1978) was was intended to fill a
short term product-line gap until the much more
ambitious i432 was released. Because it was just
a quick hack, Intel management allowed the 8086
designers only three weeks to design its
instruction set. The i432 design was a failure
and all Intel CPUs used in desktop PCs are based
on the 8086 design.
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Recall Registers and instructions

• user-accessible register
• AC (8-bit accumulator) for math/logic functions
• system register
• PC (6-bit program counter) represents the address
  of then next instruction to be executed
• instruction set
• ADD 00aaaaaa AC ? AC Maaaaaa
• AND 01aaaaaa AC ? AC AND Maaaaaa
• JMP 10aaaaaa PC ? aaaaaa
• INC 11xxxxxx AC ? AC 1

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Machine and Assembly Language

• machine language
• programs are are ultimately stored in memory as
  bit patterns (instructions) encoding operators
  and operands
• these bit patterns are called machine language
• e.g., to say add the contents of memory location
  22 to the accumulator we write 00010110
• 00 means add to accumulator and 010110 means 22
• people actually used to write software like this!
• assembly language
• memorizing bit patterns or numbers is hard
• one step up mnemonics
• easy-to-remember (?) alphabetic codes
• one mnemonic for each operator
• usually written in form operator operand
• e.g. ADD 22 rather than 00010110

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Assemblers and loaders

• an assembler is a program that
• reads a file containing the assembly-language
  representation of some program weve written
• sometimes called source code
• produces a file containing an equivalent machine
  language representation
• sometimes called object code
• we can then
• load the object code into memory
• using an external or internal program loader
• starting at some particular memory address
• set the program counter (PC register) to point to
  the memory address of the first instruction
• start the CPU, et voila, our program is executed

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Relatively Simple CPU Registers

• from Carpinelli ch. 6 (link on course web page)
• four registers
• PC program counter (16 bits)
• indicates next instruction to be executed
• target of branch and jump instructions
• AC accumulator (8 bits)
• target of all logical and arithmetic operations
• R general purpose register (8 bits)
• used as operand for all logical and arithmetic
  operations
• Z zero register (1 bit)
• set to 1 if the result of a logical or arithmetic
  operation is a zero in the accumulator
• not affected by non-arithmetic/logic operations
• basis of decision for branching operations

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Relatively Simple CPU Instructions

• sixteen instructions, 8 bit operator code
  (opcode)
• G is a 16 bit operand representing a memory
  location
• NOP no operation (do nothing)
• LDAC G load AC from memory location G
• STAC G store AC contents in memory location G
• MVAC move contents of AC to R
• MOVR move contents of R to AC
• JUMP G set PC to G
• JMPZ G if Z is 0, set PC to G
• JPNZ G if Z is 1, set PC to G
• ADD set AC to ACR, update Z
• SUB set AC to AC-R, update Z
• INAC set AC to AC1, update Z
• CLAC set AC to 0, update Z
• AND set AC to AC AND R (bitwise), update Z
• OR set AC to AC OR R (bitwise), update Z
• XOR set AC to AC XOR R (bitwise), update Z
• NOT set AC to NOT AC (bitwise), update Z

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Directives and Comments

• in addition to instructions, most assemblers
  recognize directives which affect their operation
• the assembler with Carpinellis CPU simulator
  accepts these directives
• ORG G
• start assembling instructions at location G
• DB b
• write the eight-bit (byte) value b to memory
• DB w
• write the sixteen-bit (word) value w to memory
• we can also add comments to our program by
  preceding them by a semi-colon ()
• comments have no effect on the assembler theyre
  intended for human consumption

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Example program

• Aim add the contents of memory location 20 and
  21 together, store the result in memory location
  22
• to write the program, consider
• can only add numbers that are in AC and R result
  ends up in AC
• memory contents can only be transferred to AC,
  not directly to R, but we can move values back
  and forth between AC and R
• only the value of AC can be transferred to memory

• so, we can write our program like this
• LDAC 20
• MVAC
• LDAC 21
• ADD m20m21
• STAC 22
• JUMP 65535 stop

• and we can store some test values in memory like
  this
• ORG 20
• DB 6
• DB 9

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More complex example

• Specification
• given some positive integer n, compute the sum
  of all positive integers less than or equal to n
• e.g,. given 4, compute 4321

Initial algorithm design 1 sum 0 2 counter
4 3 sum sum counter 4 counter counter -
1 5 if counter ! 0 go to line 3 6 stop
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Translated to the instruction set

• 1 sum 0
• 2 counter 4
• 3 sum sum counter
• a. load AC with counter
• b. copy AC to R
• c. load AC with sum
• d. add
• e. store AC in sum
• 4 counter counter - 1
• a. load AC with a memory location containing a
  1
• b. copy AC to R
• c. load AC with counter
• d. subtract
• e. store AC in counter
• 5 if counter ! 0 go to line 3 (3b)
• 6 stop

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As an assembler program

• ORG 36 DATA STARTS at location 36
• DB 4 counter (location 36)
• DB 1 decrement memory location
  containing a 1 (37)
• DB 0 sum (38)
• ORG 0 PROGRAM STARTS at location 0
• LDAC 36 load AC with counter
• MVAC copy AC to R (top of loop, location
  3)
• LDAC 38 load AC with sum
• ADD add AC and R (sumcounter),
  result in AC
• STAC 38 store AC in sum
• LDAC 37 load AC with decrement
• MVAC copy AC to R
• LDAC 36 load AC with counter
• SUB subtract AC from R (counter -1),
  result in AC
• STAC 36 store AC in counter
• JPNZ 3 if AC not zero, to go location 3
• JUMP 65535 otherwise, stop

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Observations

• we could simplify this program if
• there were more registers
• especially more registers connected to the ALU
• we could perform multiple-register operations
• e.g., ADD A, B, C (add A to B storing result in
  C)
• the instruction set included a decrement
  operation
• the instruction set allowed arithmetic/logic
  operations direct from memory to registers
• the program would be easier to write if
• the assembler allowed us to label instructions
  and refer to those labels as addresses
• useful for jumps, loops

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Addressing Modes

• our current program must be stored in a
  particular memory location to work why?
• can overcome this problem with relative
  addressing
• operator treated as an offset from current
  program counter
• e.g., instead of saying jump to location 3 JUMP
  3 we can say jump back seven locations JUMP -7
  ( means relative)
• also handy to
• directly indicate constants in the program
• operand treated as value, called immediate
  addressing
• e.g, we can say subtract 1 from AC SUB 1 (
  means immediate)
• access a memory location indicated by the
  contents of a register
• called indirect addressing
• e.g., we can say load the accumulator from the
  memory location pointed to by the memory location
  G LDAC (G) (parentheses mean indirect)
• handy for stepping across a range of memory
  locations
• addressing mode of the Relatively Simple CPU is
  direct addressing

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Instruction set design approaches

• modern CPUs can be thought of as falling into two
  camps
• CISC complex instruction set computing
• e.g., Intel Pentium
• RISC reduced instruction set computing
• e.g., IBM/Motorolla PowerPC, Sun Sparc,
  DEC/Compaq Alpha, Intel StrongARM
• CISC philosophy
• create a rich (large, complex) instruction set so
  programs can be written in relatively few
  instructions
• downside instructions tend to take many clock
  cycles, CISC CPUs tend to be relatively large and
  expensive
• RISC philosophy
• carefully choose a small instruction set so we
  can design each instruction to execute very
  quickly on a small, cheap CPU
• downside takes more instructions to write a
  given program

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Next class

• Operating Systems