CpE 442 Introduction To Computer Architecture Lecture 1

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CpE 442 Introduction To Computer Architecture
Lecture 1

• Instructor H. H. Ammar
• These slides are based on the lecture slides
  provided with the course text book specified in
  the course syllabus

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Overview of Todays Lecture

• Course Overview
• Levels of Representation
• Levels of Organization

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Course Overview
Computer Design

• Computer Hardware Design
• Machine Implementation
• Logic Designer's View
• "Processor Architecture"
• "Computer Organization
• Construction Engineer

Instruction Set Deign Machine Language
Compiler View "Computer Architecture"
"Instruction Set Processor" "Building Architect"
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Instruction Set Architecture

• . . . the attributes of a computing system as
  seen by the programmer, i.e. the conceptual
  structure and functional behavior, as distinct
  from the organization of the data flows and
  controls the logic design, and the physical
  implementation.
• Amdahl, and Brooks, 1964

SOFTWARE
-- Organization of Programmable Storage --
Data Types Data Structures Encodings
Representations -- Instruction Formats --
Instruction (or Operation Code) Set -- Modes of
Addressing and Accessing Data Items and
Instructions -- Exceptional Conditions
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Organization
ISA Level
FUs Interconnect
Logic Designer's View

• -- Capabilities Performance Characteristics of
  Principal Functional Units
• (e.g., Registers, ALU, Shifters, Logic Units,
  etc.
• -- Ways in which these components are
  interconnected
• -- nature of information flows between
  components
• -- logic and means by which
• such information flow is controlled.
• Choreography of FUs to realize the ISA
• Register Transfer Level Description

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What is "Computer Architecture ? A system
concept integrating software, hardware, and
firmwareto specify the design of computing
systems
Co-ordination of levels of abstraction
Application
Operating
System
Compiler
Instruction Set Architecture
I/O system
Instr. Set Proc.
Digital Design
Circuit Design
Under a set of rapidly changing Forces
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Forces on Computer Architecture
Programming
Technology
Languages
Applications
Computer Architecture
Operating
Systems
History
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Technology Microprocessor Logic Density
Memory 4x every 3 years
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Performance Trends
Supercomputers
Mainframes
Minicomputers
Microprocessors
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CPU and LAN Performance
Relative Performance
CPU
1000 100 10 1
LAN
DEC Alpha
1 Gb ATM
MIPS M/120
100 Mb FDDI
10 Mb
Year
1980 1985 1990 1995
2000
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Levels of Representation
temp vk vk vk1 vk1 temp
High Level Language Program
Compiler

• lw 15, 0(2)
• lw 16, 4(2)
• sw 16, 0(2)
• sw 15, 4(2)

Assembly Language Program
Assembler
Machine Language Program
Machine Interpretation
Control Signal Spec
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MIPS R3000 Instruction Set Architecture

• Instruction Categories
• Load/Store
• Computational
• Jump and Branch
• Floating Point
• coprocessor
• Memory Management
• Special

R0 - R31
PC
HI
LO
Instruction Format
OP
rs
rd
sa
funct
rt
OP
rs
rt
immediate
OP
target
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Measurement and Evaluation
Architecture is an iterative process --
searching the space of possible designs --
at all levels of computer systems
Creativity
Cost / Performance Analysis
Good Ideas
Mediocre Ideas
Bad Ideas
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Course Overview (cont)
Computer Design

• Computer Hardware Design
• Machine Implementation\
• Logic Designer's View
• "Processor Architecture"
• "Computer Organization"
• Construction Engineer

Instruction Set Deign Machine Language
Compiler View "Computer Architecture"
"Instruction Set Processor" "Building Architect"
Few people design computers! Very few design
instruction sets! Many people design computer
components. Very many people are concerned with
computer function, in detail.
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So what's in it for me?

• In-depth understanding of the inner-workings of
  modern computers, their evolution, and trade-offs
  present at the hardware/software boundary.
• Insight into fast/slow operations that are
  easy/hard to implementation hardware
• Understanding of the design process in the
  context of a large complex (hardware) design.
• Functional Spec --gt Control Datapath --gt
  Physical implementation

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Architecture Demo
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The SPARCstation 20
Memory SIMMs
Memory Controller
Memory Bus
MBus
Disk
Tape
SCSI Bus
SBus
MSBI
SEC
MACIO
Keyboard
Floppy
External Bus
Mouse
Disk
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Levels of Organization
SPARCstation 20
Computer
SPARC Processor
Memory
Devices
Control
Input
Datapath
Output
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The Underlying Network
Memory Bus
Memory Controller
Standard I/O Bus
SCSI Bus
Processor Bus MBus
Suns High Speed I/O Bus SBus
MSBI
SEC
MACIO
Low Speed I/O Bus External Bus
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Processor and Caches
MBus Module
SuperSPARC Processor
MBus
Datapath
Registers
Internal Cache
Control
External Cache
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Memory
Memory Bus
Memory Controller
DRAM SIMM
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Input and Output (I/O) Devices

• SCSI Bus Standard I/O Devices
• SBus High Speed I/O Devices
• External Bus Low Speed I/O Device

Disk
Tape
SCSI Bus
SBus
SEC
MACIO
Keyboard
Floppy
External Bus
Mouse
Disk
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Standard I/O Devices

• SCSI Small Computer Systems Interface
• A standard interface (IBM, Apple, HP, Sun ...
  etc.)
• Computers and I/O devices communicate with each
  other
• The hard disk is one I/O device resides on the
  SCSI Bus

Disk
Tape
SCSI Bus
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High Speed I/O Devices

• SBus is SUNs own high speed I/O bus
• SS20 has four SBus slots where we can plug in I/O
  devices
• Example graphics accelerator, video adaptor, ...
  etc.
• High speed and low speed are relative terms

SBus
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Slow Speed I/O Devices

• The are only four SBus slots in SS20--seats are
  expensive
• The speed of some I/O devices is limited by human
  reaction time--very very slow by computer
  standard
• Examples Keyboard and mouse
• No reason to use up one of the expensive SBus slot

Keyboard
Floppy
External Bus
Mouse
Disk
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Summary

• All computers consist of five components
• Processor (1) datapath and (2) control
• (3) Memory
• (4) Input devices and (5) Output devices
• Not all memory are created equally
• Cache fast (expensive) memory are placed closer
  to the processor
• Main memory less expensive memory--we can have
  more
• Input and output (I/O) devices has the messiest
  organization
• Wide range of speed graphics vs. keyboard
• Wide range of requirements speed, standard, cost
  ... etc.
• Least amount of research (so far)