Microprogramming

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Microprogramming

• Andreas Klappenecker
• CPSC321 Computer Architecture

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Implementation of the Finite State Machine
Control Logic
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Graphical Specification of FSM
How many state bits are needed?
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Two-Level Logic

• Any logic function can be written in a two-level
• representation, e.g. the sums-of-products form
• E AB C AC B BC A
• It uses the logical OR of products (AND ops)
• Contains variable or complemented variable

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PLA Implementation

• Two level logic

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Finite State Machine for Control

• Implementation

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Microprogramming
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Motivation

• The full MIPS instruction set contains over 100
  instructions
• Instructions can take from 1 clock cycle to more
  than 20 clock cycles
• Pipelining will lead to explosion of states
• It follows that the control will be quite complex
  gt FSM can be cumbersome
• Use microprogramming!

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Microprogramming

• Implementation of MIPS instructions as a sequence
  of simpler instructions
• Design of the microinstruction format
• Write a program
• Eases implementations of pipelined processor

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Micro-Instructions

• What is needed?
• ALU control signals
• Program counter control signals
• Complete data path
• What do we do?
• Analyze what is happening at each step
• Express in a column oriented way
• Translate it into binary
• Store it in an appropriate form

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A Simple Implementation
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Microprogram

• Physical implementation ROM or PLA
• Each micro-instruction has an address
• Sequentially ordered
• Each sequence step is one cycle
• Selection of next instruction
• Address increment (sequencing field seq)
• Fetch begins fetching the next micro-instruction
  (sequencing field fetch)
• Dispatch jump to the next micro-instruction, the
  number i indicates the location in the dispatch
  table

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Microinstruction format
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Microcode Trade-offs

• Specification Advantages
• Easy to design and write
• Design architecture and microcode in parallel
• Implementation (off-chip ROM) Advantages
• Easy to change since values are in memory
• Can emulate other architectures
• Can make use of internal registers
• Implementation Disadvantages SLOWER
• Control is implemented on same chip as processor
• ROM is no longer faster than RAM
• No need to go back and make changes