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Router Architecture

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Radix trie and variants. Compressed trie. Binary search on prefix intervals ... Radix Trie. W-bit prefixes. Lookup complexity: O(W) Storage complexity: O(NW) ... – PowerPoint PPT presentation

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Title: Router Architecture


1
Router Architecture
  • Prof. Gao
  • ECE697A Fall 2003
  • Advanced Computer Networks

2
Outline
  • Router Architecture
  • Switching Fabrics
  • Interface Cards
  • Routing Engines
  • Forwarding Engines
  • Routing Lookup
  • Exact matching
  • Longest prefix matching
  • Packet Classification

3
Internet Architecture
AS2
AS1
AS4
AS3
4
Routers at Three Levels
Backbone routers
Access routers
Enterprise routers
5
Design Issues for Routers
  • Backbone Router
  • Reliability
  • Speed/Performance
  • Enterprise Router
  • Low cost per port
  • Large number of ports
  • Easy to configure
  • Access Router
  • Home customer/small business
  • Low cost
  • Modem pool

6
Router Architecture
Routing Engines
Packets In
Packets Out
Packet Forwarding Engines
7
Routing Components
Route Processing
Route updates
Topology address exchange with neighboring nodes
Topology address exchange with neighboring nodes
Routing table
Destination address lookup
Packet Forwarding
Incoming packets
Outgoing packets
data
data
8
Router Components
  • Switching fabric
  • Interface cards
  • Routing Engines
  • Forwarding Engines

9
Switching Fabrics
  • Shared memory
  • Speed is limited by memory access speed
  • Bus
  • Speed is limited by bus capacitance
  • Space division (crossbar)
  • Speed is limited by the scheduler

10
Problems of bus-based router
  • Data cross the bus twice
  • Packet processing and node management software
    are on the central processor
  • Performance depends on the throughput of the
    shared bus and the forwarding speed of the
    central processor.

11
Architecture with route caching
Route Processor
Memory
Cache updates
Bus
DMA
DMA
DMA
Line Card
Line Card
Line Card
Route Cache
Route Cache
Route Cache
Memory
Memory
Memory
MAC
MAC
MAC
12
Switched-Crossbar
13
Line Card Design
  • One Line Card
  • Multiple interfaces
  • Support high speed line
  • 2.5Gb/s
  • Disjoint inbound/outbound Processing
  • Inbound Packet Processing
  • Outbound Packet Processing

14
Input/Output Queue
  • Input Queue
  • Line speed gt switching fabric speed
  • Output Queue
  • Line speed lt switching fabric speed

15
Scheduling on Multiple Queues
  • First Come Fist Served (FCFS)
  • Fair Queuing
  • R an ideal rate of service at a bottleneck link
  • w1, w2 wn represent the weights for each
    queue
  • The ideal service for K is
  • Rwk/?(wi)
  • Well behaved source does not see packet losses
  • Guarantee a minimum share of link capacity for
    each source

16
Routing Engine
  • Calculate the routing information
  • Update routing tables
  • Update forwarding tables

17
Forwarding Engines
  • Data Processing
  • Optimal code for processing
  • Small instructions and less cycles
  • Check header/length/TTL/option
  • Might not do checksum
  • 21 increasing cycles to pay to check for a rare
    error
  • Data Forwarding
  • Cache forwarding tables
  • Data structure of forwarding table
  • IP lookup algorithm

18
Router Architecture
  • Packet Forwarding
  • According to forwarding tables, forward packets
    to interfaces

Routing Engines
Packets In
Packets Out
Packet Forwarding Engines
19
Lookup Speed
  • Lookup mechanism
  • Must be simple
  • Easy to implement

20
Memory Technology (2003-04)
Note Price, speed and power are manufacturer and
market dependent.
21
Lookup Mechanism
22
Exact Matches in Ethernet Switches
  • Layer-2 addresses are usually 48-bits long
  • Address is global
  • 248 gt 1012, cannot hold all addresses in a table
    and use direct lookup
  • Associative lookup
  • Hashing lookup
  • Tree and Trie

23
Associative Lookup
  • Associative memory (aka Content Addressable
    Memory, CAM) compares all entries in parallel
    against incoming data.

Associative Memory (CAM)
Network address
Location
Address
Data
48bits
Match
24
Hashing Lookup
Memory
Memory
Network Address
Hashing Function
Pointer
16, say
List/Bucket
Address
Data
Data
Address
48
List of network addresses in this bucket
  • Use a pseudo-random hash function (relatively
    insensitive to actual function)
  • Bucket linearly searched (or could be binary
    search, etc.)
  • Leads to unpredictable number of memory references

25
Trees and Tries
Binary Search Tree
Binary Search Trie
lt
gt
0
1
lt
gt
lt
gt
0
1
0
1
111
010
Lookup time bounded and independent of table
size, storage is O(NW) W address length
Lookup time dependent on table size, but
independent of address length, storage is O(N)
26
Tries
  • Advantages
  • Fixed lookup time
  • Simple to implement and update
  • Disadvantages
  • Inefficient use of memory and/or requires large
    number of memory references

27
Longest Prefix Matching IPv4 Addresses
  • 32-bit addresses
  • Address space 0, 232-1 4.29G
  • Address a.b.c.d
  • Integer a224b216c28d

IP Number Line
0.0.0.0
255.255.255.255
28
CIDRHierarchical Route Aggregation
Router
Backbone
R3
R1
R4
R2
R2
ISP, P
ISP, Q
192.2.0/22
200.11.0/22
Site, S
Site, T
192.2.1/24
192.2.2/24
29
Routing Lookups with CIDR
192.2.2/24
192.2.2/24, R3
192.2.0/22
200.11.0/22
192.2.0/22, R2
200.11.0/22, R4
200.11.0.33
192.2.0.1
LPM Find the most specific route, or the longest
matching prefix among all the prefixes matching
the destination address of an incoming packet
30
Longest Prefix Match is Hard
  • No information to determine the length of the
    longest matching prefix in packet
  • We need to search among the space of all prefix
    lengths

31
LPM in IPv4Use 32 exact match algorithms for LPM!
Exact match against prefixes of length 1
Network Address
Exact match against prefixes of length 2
Port
Priority Encode and pick
Exact match against prefixes of length 32
32
Metrics for Lookup Algorithms
  • Speed
  • number of memory accesses
  • Storage requirements
  • amount of memory
  • Low update time
  • Scalability
  • With length of prefix
  • IPv4 unicast (32b), IPv6 unicast (128b)
  • With size of routing table
  • Flexibility in implementation
  • Low preprocessing time

33
Radix Trie
Trie node
A
next-hop-ptr (if prefix)
1
B
right-ptr
left-ptr
1
C
D
0
P2
1
1
F
E
P1
0
G
P3
1
H
P4
34
Radix Trie
  • W-bit prefixes
  • Lookup complexity O(W)
  • Storage complexity O(NW)
  • Update complexity O(W)
  • Advantages
  • Simplicity
  • Extensible to wider fields
  • Disadvantages
  • Worst case lookup slow
  • Wastage of storage space in chains

35
Packet Classification
  • Packet Filtering
  • Deny all traffic from ISP3 destined to E2
  • Accounting Billing
  • Treat all video traffic to E1 as highest priority
    and perform accounting for the traffic sent this
    way

36
Packet Classification Problem
  • Based on a number of fields in packet header
  • Source/destination IP address (32 bits)
  • Source/destination port number (16 bits)
  • TOS byte (8 bits)
  • Type of protocol (8 bits)
  • Or other fields

37
Example of Classification Rules
  • Access-control in firewalls
  • Deny all e-mail traffic from ISP-X to Y
  • Policy-based routing
  • Route IP telephony traffic from X to Y via ATM
  • Differentiate quality of service
  • Ensure that no more than 50 Mbps are injected
    from ISP-X
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